mirror of https://github.com/torvalds/linux.git
Devicetree updates for v6.19:
DT bindings:
- Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma, brcm,sr-thermal,
amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions Owl SPS, Marvell
AP80x System Controller, Marvell CP110 System Controller,
cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema format
- Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W
EEPROM, and Microchip pic64gx PLIC
- Add missing LGE, AMD Seattle, and APM X-Gene SoC platform compatibles
- Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi
bindings to fix warnings on BCM2712 platforms
- Drop obsolete db8500-thermal.txt
- Treewide clean-up of extra blank lines and inconsistent quoting
- Ensure all .dtbo targets are applied to a base .dtb
- Speed up dt_binding_check by skipping running validation on empty
examples
DT core:
- Add of_machine_device_match() and of_machine_get_match_data() helpers
and convert users treewide
- Fix bounds checking of address properties in FDT code. Rework the code
to have a single implementation of the bounds checks.
- Rework of_irq_init() to ignore any implicit interrupt-parent (i.e. in
a parent node) on nodes without an interrupt. This matches the spec
description and fixes some RISC-V platforms.
- Avoid a spurious message on overlay removal
- Skip DT kunit tests on RISCV+ACPI
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Merge tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT bindings:
- Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma,
brcm,sr-thermal, amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions
Owl SPS, Marvell AP80x System Controller, Marvell CP110 System
Controller, cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema
format
- Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W
EEPROM, and Microchip pic64gx PLIC
- Add missing LGE, AMD Seattle, and APM X-Gene SoC platform
compatibles
- Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi
bindings to fix warnings on BCM2712 platforms
- Drop obsolete db8500-thermal.txt
- Treewide clean-up of extra blank lines and inconsistent quoting
- Ensure all .dtbo targets are applied to a base .dtb
- Speed up dt_binding_check by skipping running validation on empty
examples
DT core:
- Add of_machine_device_match() and of_machine_get_match_data()
helpers and convert users treewide
- Fix bounds checking of address properties in FDT code. Rework the
code to have a single implementation of the bounds checks.
- Rework of_irq_init() to ignore any implicit interrupt-parent (i.e.
in a parent node) on nodes without an interrupt. This matches the
spec description and fixes some RISC-V platforms.
- Avoid a spurious message on overlay removal
- Skip DT kunit tests on RISCV+ACPI"
* tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits)
dt-bindings: kbuild: Skip validating empty examples
dt-bindings: interrupt-controller: brcm,bcm2836-l1-intc: Drop interrupt-controller requirement
dt-bindings: display: Fix brcm,bcm2835-hvs bindings for BCM2712
dt-bindings: display: bcm2711-hdmi: Add interrupt details for BCM2712
of: Skip devicetree kunit tests when RISCV+ACPI doesn't populate root node
soc: tegra: Simplify with of_machine_device_match()
soc: qcom: ubwc: Simplify with of_machine_get_match_data()
powercap: dtpm: Simplify with of_machine_get_match_data()
platform: surface: Simplify with of_machine_get_match_data()
irqchip/atmel-aic: Simplify with of_machine_get_match_data()
firmware: qcom: scm: Simplify with of_machine_device_match()
cpuidle: big_little: Simplify with of_machine_device_match()
cpufreq: sun50i: Simplify with of_machine_device_match()
cpufreq: mediatek: Simplify with of_machine_get_match_data()
cpufreq: dt-platdev: Simplify with of_machine_get_match_data()
of: Add wrappers to match root node with OF device ID tables
dt-bindings: eeprom: at25: Add Anvo ANV32C81W
of/reserved_mem: Simplify the logic of __reserved_mem_alloc_size()
of/reserved_mem: Simplify the logic of fdt_scan_reserved_mem_reg_nodes()
of/reserved_mem: Simplify the logic of __reserved_mem_reserve_reg()
...
This commit is contained in:
Linus Torvalds
commit
6044a1ee9d
|
|
@ -30,7 +30,7 @@ rules:
|
|||
document-start:
|
||||
present: true
|
||||
empty-lines:
|
||||
max: 3
|
||||
max: 1
|
||||
max-end: 1
|
||||
empty-values:
|
||||
forbid-in-block-mappings: true
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ find_cmd = $(find_all_cmd) | \
|
|||
sed 's|^$(srctree)/||' | \
|
||||
grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" | \
|
||||
sed 's|^|$(srctree)/|'
|
||||
CHK_DT_EXAMPLES := $(patsubst $(srctree)/%.yaml,%.example.dtb, $(shell $(find_cmd)))
|
||||
CHK_DT_EXAMPLES := $(patsubst $(srctree)/%.yaml,%.example.dtb, \
|
||||
$(shell $(find_cmd) | xargs grep -l '^examples:'))
|
||||
|
||||
quiet_cmd_yamllint = LINT $(src)
|
||||
cmd_yamllint = ($(find_cmd) | \
|
||||
|
|
|
|||
|
|
@ -27,17 +27,17 @@ properties:
|
|||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^osc[0-9]$":
|
||||
'^osc[0-9]$':
|
||||
type: object
|
||||
|
||||
"^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$":
|
||||
'^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$':
|
||||
type: object
|
||||
$ref: '#/$defs/clock-props'
|
||||
unevaluatedProperties: false
|
||||
|
|
@ -58,14 +58,14 @@ properties:
|
|||
minItems: 1
|
||||
maxItems: 5
|
||||
|
||||
"#address-cells":
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^[a-z0-9,_]+(clk|pll)(@[a-f0-9]+)?$":
|
||||
'^[a-z0-9,_]+(clk|pll)(@[a-f0-9]+)?$':
|
||||
type: object
|
||||
$ref: '#/$defs/clock-props'
|
||||
unevaluatedProperties: false
|
||||
|
|
@ -86,11 +86,11 @@ properties:
|
|||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- "#clock-cells"
|
||||
- '#clock-cells'
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#clock-cells"
|
||||
- '#clock-cells'
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
@ -104,7 +104,7 @@ $defs:
|
|||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#clock-cells":
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
clk-gate:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,24 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/amd,seattle.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: AMD Seattle SoC Platforms
|
||||
|
||||
maintainers:
|
||||
- Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
|
||||
- Tom Lendacky <thomas.lendacky@amd.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Boards with AMD Seattle SoC
|
||||
items:
|
||||
- const: amd,seattle-overdrive
|
||||
- const: amd,seattle
|
||||
|
||||
additionalProperties: true
|
||||
...
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/apm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: APM X-Gene SoC Platforms
|
||||
|
||||
maintainers:
|
||||
- Khuong Dinh <khuong@os.amperecomputing.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Boards with X-Gene1 Soc
|
||||
items:
|
||||
- const: apm,mustang
|
||||
- const: apm,xgene-storm
|
||||
|
||||
- description: Boards with X-Gene2 SoC
|
||||
items:
|
||||
- const: apm,merlin
|
||||
- const: apm,xgene-shadowcat
|
||||
|
||||
additionalProperties: true
|
||||
...
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/lge.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LG Electronics SoC Platforms
|
||||
|
||||
maintainers:
|
||||
- Chanho Min <chanho.min@lge.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Boards with LG1312 Soc
|
||||
items:
|
||||
- const: lge,lg1312-ref
|
||||
- const: lge,lg1312
|
||||
|
||||
- description: Boards with LG1313 SoC
|
||||
items:
|
||||
- const: lge,lg1313-ref
|
||||
- const: lge,lg1313
|
||||
|
||||
additionalProperties: true
|
||||
...
|
||||
|
|
@ -1,146 +0,0 @@
|
|||
Marvell Armada AP80x System Controller
|
||||
======================================
|
||||
|
||||
The AP806/AP807 is one of the two core HW blocks of the Marvell Armada
|
||||
7K/8K/931x SoCs. It contains system controllers, which provide several
|
||||
registers giving access to numerous features: clocks, pin-muxing and
|
||||
many other SoC configuration items. This DT binding allows to describe
|
||||
these system controllers.
|
||||
|
||||
For the top level node:
|
||||
- compatible: must be: "syscon", "simple-mfd";
|
||||
- reg: register area of the AP80x system controller
|
||||
|
||||
SYSTEM CONTROLLER 0
|
||||
===================
|
||||
|
||||
Clocks:
|
||||
-------
|
||||
|
||||
|
||||
The Device Tree node representing the AP806/AP807 system controller
|
||||
provides a number of clocks:
|
||||
|
||||
- 0: reference clock of CPU cluster 0
|
||||
- 1: reference clock of CPU cluster 1
|
||||
- 2: fixed PLL at 1200 Mhz
|
||||
- 3: MSS clock, derived from the fixed PLL
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be one of:
|
||||
* "marvell,ap806-clock"
|
||||
* "marvell,ap807-clock"
|
||||
- #clock-cells: must be set to 1
|
||||
|
||||
Pinctrl:
|
||||
--------
|
||||
|
||||
For common binding part and usage, refer to
|
||||
Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt.
|
||||
|
||||
Required properties:
|
||||
- compatible must be "marvell,ap806-pinctrl",
|
||||
|
||||
Available mpp pins/groups and functions:
|
||||
Note: brackets (x) are not part of the mpp name for marvell,function and given
|
||||
only for more detailed description in this document.
|
||||
|
||||
name pins functions
|
||||
================================================================================
|
||||
mpp0 0 gpio, sdio(clk), spi0(clk)
|
||||
mpp1 1 gpio, sdio(cmd), spi0(miso)
|
||||
mpp2 2 gpio, sdio(d0), spi0(mosi)
|
||||
mpp3 3 gpio, sdio(d1), spi0(cs0n)
|
||||
mpp4 4 gpio, sdio(d2), i2c0(sda)
|
||||
mpp5 5 gpio, sdio(d3), i2c0(sdk)
|
||||
mpp6 6 gpio, sdio(ds)
|
||||
mpp7 7 gpio, sdio(d4), uart1(rxd)
|
||||
mpp8 8 gpio, sdio(d5), uart1(txd)
|
||||
mpp9 9 gpio, sdio(d6), spi0(cs1n)
|
||||
mpp10 10 gpio, sdio(d7)
|
||||
mpp11 11 gpio, uart0(txd)
|
||||
mpp12 12 gpio, sdio(pw_off), sdio(hw_rst)
|
||||
mpp13 13 gpio
|
||||
mpp14 14 gpio
|
||||
mpp15 15 gpio
|
||||
mpp16 16 gpio
|
||||
mpp17 17 gpio
|
||||
mpp18 18 gpio
|
||||
mpp19 19 gpio, uart0(rxd), sdio(pw_off)
|
||||
|
||||
GPIO:
|
||||
-----
|
||||
For common binding part and usage, refer to
|
||||
Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "marvell,armada-8k-gpio"
|
||||
|
||||
- offset: offset address inside the syscon block
|
||||
|
||||
Optional properties:
|
||||
|
||||
- marvell,pwm-offset: offset address of PWM duration control registers inside
|
||||
the syscon block
|
||||
|
||||
Example:
|
||||
ap_syscon: system-controller@6f4000 {
|
||||
compatible = "syscon", "simple-mfd";
|
||||
reg = <0x6f4000 0x1000>;
|
||||
|
||||
ap_clk: clock {
|
||||
compatible = "marvell,ap806-clock";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
ap_pinctrl: pinctrl {
|
||||
compatible = "marvell,ap806-pinctrl";
|
||||
};
|
||||
|
||||
ap_gpio: gpio {
|
||||
compatible = "marvell,armada-8k-gpio";
|
||||
offset = <0x1040>;
|
||||
ngpios = <19>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&ap_pinctrl 0 0 19>;
|
||||
marvell,pwm-offset = <0x10c0>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&ap_clk 3>;
|
||||
};
|
||||
};
|
||||
|
||||
SYSTEM CONTROLLER 1
|
||||
===================
|
||||
|
||||
Cluster clocks:
|
||||
---------------
|
||||
|
||||
Device Tree Clock bindings for cluster clock of Marvell
|
||||
AP806/AP807. Each cluster contain up to 2 CPUs running at the same
|
||||
frequency.
|
||||
|
||||
Required properties:
|
||||
- compatible: must be one of:
|
||||
* "marvell,ap806-cpu-clock"
|
||||
* "marvell,ap807-cpu-clock"
|
||||
- #clock-cells : should be set to 1.
|
||||
|
||||
- clocks : shall be the input parent clock(s) phandle for the clock
|
||||
(one per cluster)
|
||||
|
||||
- reg: register range associated with the cluster clocks
|
||||
|
||||
ap_syscon1: system-controller@6f8000 {
|
||||
compatible = "marvell,armada-ap806-syscon1", "syscon", "simple-mfd";
|
||||
reg = <0x6f8000 0x1000>;
|
||||
|
||||
cpu_clk: clock-cpu@278 {
|
||||
compatible = "marvell,ap806-cpu-clock";
|
||||
clocks = <&ap_clk 0>, <&ap_clk 1>;
|
||||
#clock-cells = <1>;
|
||||
reg = <0x278 0xa30>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,191 +0,0 @@
|
|||
Marvell Armada CP110 System Controller
|
||||
======================================
|
||||
|
||||
The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K
|
||||
SoCs. It contains system controllers, which provide several registers
|
||||
giving access to numerous features: clocks, pin-muxing and many other
|
||||
SoC configuration items. This DT binding allows to describe these
|
||||
system controllers.
|
||||
|
||||
For the top level node:
|
||||
- compatible: must be: "syscon", "simple-mfd";
|
||||
- reg: register area of the CP110 system controller
|
||||
|
||||
SYSTEM CONTROLLER 0
|
||||
===================
|
||||
|
||||
Clocks:
|
||||
-------
|
||||
|
||||
The Device Tree node representing this System Controller 0 provides a
|
||||
number of clocks:
|
||||
|
||||
- a set of core clocks
|
||||
- a set of gateable clocks
|
||||
|
||||
Those clocks can be referenced by other Device Tree nodes using two
|
||||
cells:
|
||||
- The first cell must be 0 or 1. 0 for the core clocks and 1 for the
|
||||
gateable clocks.
|
||||
- The second cell identifies the particular core clock or gateable
|
||||
clocks.
|
||||
|
||||
The following clocks are available:
|
||||
- Core clocks
|
||||
- 0 0 APLL
|
||||
- 0 1 PPv2 core
|
||||
- 0 2 EIP
|
||||
- 0 3 Core
|
||||
- 0 4 NAND core
|
||||
- 0 5 SDIO core
|
||||
- Gateable clocks
|
||||
- 1 0 Audio
|
||||
- 1 1 Comm Unit
|
||||
- 1 2 NAND
|
||||
- 1 3 PPv2
|
||||
- 1 4 SDIO
|
||||
- 1 5 MG Domain
|
||||
- 1 6 MG Core
|
||||
- 1 7 XOR1
|
||||
- 1 8 XOR0
|
||||
- 1 9 GOP DP
|
||||
- 1 11 PCIe x1 0
|
||||
- 1 12 PCIe x1 1
|
||||
- 1 13 PCIe x4
|
||||
- 1 14 PCIe / XOR
|
||||
- 1 15 SATA
|
||||
- 1 16 SATA USB
|
||||
- 1 17 Main
|
||||
- 1 18 SD/MMC/GOP
|
||||
- 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART)
|
||||
- 1 22 USB3H0
|
||||
- 1 23 USB3H1
|
||||
- 1 24 USB3 Device
|
||||
- 1 25 EIP150
|
||||
- 1 26 EIP197
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be:
|
||||
"marvell,cp110-clock"
|
||||
- #clock-cells: must be set to 2
|
||||
|
||||
Pinctrl:
|
||||
--------
|
||||
|
||||
For common binding part and usage, refer to the file
|
||||
Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "marvell,armada-7k-pinctrl", "marvell,armada-8k-cpm-pinctrl",
|
||||
"marvell,armada-8k-cps-pinctrl" or "marvell,cp115-standalone-pinctrl"
|
||||
depending on the specific variant of the SoC being used.
|
||||
|
||||
Available mpp pins/groups and functions:
|
||||
Note: brackets (x) are not part of the mpp name for marvell,function and given
|
||||
only for more detailed description in this document.
|
||||
|
||||
name pins functions
|
||||
================================================================================
|
||||
mpp0 0 gpio, dev(ale1), au(i2smclk), ge0(rxd3), tdm(pclk), ptp(pulse), mss_i2c(sda), uart0(rxd), sata0(present_act), ge(mdio)
|
||||
mpp1 1 gpio, dev(ale0), au(i2sdo_spdifo), ge0(rxd2), tdm(drx), ptp(clk), mss_i2c(sck), uart0(txd), sata1(present_act), ge(mdc)
|
||||
mpp2 2 gpio, dev(ad15), au(i2sextclk), ge0(rxd1), tdm(dtx), mss_uart(rxd), ptp(pclk_out), i2c1(sck), uart1(rxd), sata0(present_act), xg(mdc)
|
||||
mpp3 3 gpio, dev(ad14), au(i2slrclk), ge0(rxd0), tdm(fsync), mss_uart(txd), pcie(rstoutn), i2c1(sda), uart1(txd), sata1(present_act), xg(mdio)
|
||||
mpp4 4 gpio, dev(ad13), au(i2sbclk), ge0(rxctl), tdm(rstn), mss_uart(rxd), uart1(cts), pcie0(clkreq), uart3(rxd), ge(mdc)
|
||||
mpp5 5 gpio, dev(ad12), au(i2sdi), ge0(rxclk), tdm(intn), mss_uart(txd), uart1(rts), pcie1(clkreq), uart3(txd), ge(mdio)
|
||||
mpp6 6 gpio, dev(ad11), ge0(txd3), spi0(csn2), au(i2sextclk), sata1(present_act), pcie2(clkreq), uart0(rxd), ptp(pulse)
|
||||
mpp7 7 gpio, dev(ad10), ge0(txd2), spi0(csn1), spi1(csn1), sata0(present_act), led(data), uart0(txd), ptp(clk)
|
||||
mpp8 8 gpio, dev(ad9), ge0(txd1), spi0(csn0), spi1(csn0), uart0(cts), led(stb), uart2(rxd), ptp(pclk_out), synce1(clk)
|
||||
mpp9 9 gpio, dev(ad8), ge0(txd0), spi0(mosi), spi1(mosi), pcie(rstoutn), synce2(clk)
|
||||
mpp10 10 gpio, dev(readyn), ge0(txctl), spi0(miso), spi1(miso), uart0(cts), sata1(present_act)
|
||||
mpp11 11 gpio, dev(wen1), ge0(txclkout), spi0(clk), spi1(clk), uart0(rts), led(clk), uart2(txd), sata0(present_act)
|
||||
mpp12 12 gpio, dev(clk_out), nf(rbn1), spi1(csn1), ge0(rxclk)
|
||||
mpp13 13 gpio, dev(burstn), nf(rbn0), spi1(miso), ge0(rxctl), mss_spi(miso)
|
||||
mpp14 14 gpio, dev(bootcsn), dev(csn0), spi1(csn0), spi0(csn3), au(i2sextclk), spi0(miso), sata0(present_act), mss_spi(csn)
|
||||
mpp15 15 gpio, dev(ad7), spi1(mosi), spi0(mosi), mss_spi(mosi), ptp(pulse_cp2cp)
|
||||
mpp16 16 gpio, dev(ad6), spi1(clk), mss_spi(clk)
|
||||
mpp17 17 gpio, dev(ad5), ge0(txd3)
|
||||
mpp18 18 gpio, dev(ad4), ge0(txd2), ptp(clk_cp2cp)
|
||||
mpp19 19 gpio, dev(ad3), ge0(txd1), wakeup(out_cp2cp)
|
||||
mpp20 20 gpio, dev(ad2), ge0(txd0)
|
||||
mpp21 21 gpio, dev(ad1), ge0(txctl), sei(in_cp2cp)
|
||||
mpp22 22 gpio, dev(ad0), ge0(txclkout), wakeup(in_cp2cp)
|
||||
mpp23 23 gpio, dev(a1), au(i2smclk), link(rd_in_cp2cp)
|
||||
mpp24 24 gpio, dev(a0), au(i2slrclk)
|
||||
mpp25 25 gpio, dev(oen), au(i2sdo_spdifo)
|
||||
mpp26 26 gpio, dev(wen0), au(i2sbclk)
|
||||
mpp27 27 gpio, dev(csn0), spi1(miso), mss_gpio4, ge0(rxd3), spi0(csn4), ge(mdio), sata0(present_act), uart0(rts), rei(in_cp2cp)
|
||||
mpp28 28 gpio, dev(csn1), spi1(csn0), mss_gpio5, ge0(rxd2), spi0(csn5), pcie2(clkreq), ptp(pulse), ge(mdc), sata1(present_act), uart0(cts), led(data)
|
||||
mpp29 29 gpio, dev(csn2), spi1(mosi), mss_gpio6, ge0(rxd1), spi0(csn6), pcie1(clkreq), ptp(clk), mss_i2c(sda), sata0(present_act), uart0(rxd), led(stb)
|
||||
mpp30 30 gpio, dev(csn3), spi1(clk), mss_gpio7, ge0(rxd0), spi0(csn7), pcie0(clkreq), ptp(pclk_out), mss_i2c(sck), sata1(present_act), uart0(txd), led(clk)
|
||||
mpp31 31 gpio, dev(a2), mss_gpio4, pcie(rstoutn), ge(mdc)
|
||||
mpp32 32 gpio, mii(col), mii(txerr), mss_spi(miso), tdm(drx), au(i2sextclk), au(i2sdi), ge(mdio), sdio(v18_en), pcie1(clkreq), mss_gpio0
|
||||
mpp33 33 gpio, mii(txclk), sdio(pwr10), mss_spi(csn), tdm(fsync), au(i2smclk), sdio(bus_pwr), xg(mdio), pcie2(clkreq), mss_gpio1
|
||||
mpp34 34 gpio, mii(rxerr), sdio(pwr11), mss_spi(mosi), tdm(dtx), au(i2slrclk), sdio(wr_protect), ge(mdc), pcie0(clkreq), mss_gpio2
|
||||
mpp35 35 gpio, sata1(present_act), i2c1(sda), mss_spi(clk), tdm(pclk), au(i2sdo_spdifo), sdio(card_detect), xg(mdio), ge(mdio), pcie(rstoutn), mss_gpio3
|
||||
mpp36 36 gpio, synce2(clk), i2c1(sck), ptp(clk), synce1(clk), au(i2sbclk), sata0(present_act), xg(mdc), ge(mdc), pcie2(clkreq), mss_gpio5
|
||||
mpp37 37 gpio, uart2(rxd), i2c0(sck), ptp(pclk_out), tdm(intn), mss_i2c(sck), sata1(present_act), ge(mdc), xg(mdc), pcie1(clkreq), mss_gpio6, link(rd_out_cp2cp)
|
||||
mpp38 38 gpio, uart2(txd), i2c0(sda), ptp(pulse), tdm(rstn), mss_i2c(sda), sata0(present_act), ge(mdio), xg(mdio), au(i2sextclk), mss_gpio7, ptp(pulse_cp2cp)
|
||||
mpp39 39 gpio, sdio(wr_protect), au(i2sbclk), ptp(clk), spi0(csn1), sata1(present_act), mss_gpio0
|
||||
mpp40 40 gpio, sdio(pwr11), synce1(clk), mss_i2c(sda), au(i2sdo_spdifo), ptp(pclk_out), spi0(clk), uart1(txd), ge(mdio), sata0(present_act), mss_gpio1
|
||||
mpp41 41 gpio, sdio(pwr10), sdio(bus_pwr), mss_i2c(sck), au(i2slrclk), ptp(pulse), spi0(mosi), uart1(rxd), ge(mdc), sata1(present_act), mss_gpio2, rei(out_cp2cp)
|
||||
mpp42 42 gpio, sdio(v18_en), sdio(wr_protect), synce2(clk), au(i2smclk), mss_uart(txd), spi0(miso), uart1(cts), xg(mdc), sata0(present_act), mss_gpio4
|
||||
mpp43 43 gpio, sdio(card_detect), synce1(clk), au(i2sextclk), mss_uart(rxd), spi0(csn0), uart1(rts), xg(mdio), sata1(present_act), mss_gpio5, wakeup(out_cp2cp)
|
||||
mpp44 44 gpio, ge1(txd2), uart0(rts), ptp(clk_cp2cp)
|
||||
mpp45 45 gpio, ge1(txd3), uart0(txd), pcie(rstoutn)
|
||||
mpp46 46 gpio, ge1(txd1), uart1(rts)
|
||||
mpp47 47 gpio, ge1(txd0), spi1(clk), uart1(txd), ge(mdc)
|
||||
mpp48 48 gpio, ge1(txctl_txen), spi1(mosi), xg(mdc), wakeup(in_cp2cp)
|
||||
mpp49 49 gpio, ge1(txclkout), mii(crs), spi1(miso), uart1(rxd), ge(mdio), pcie0(clkreq), sdio(v18_en), sei(out_cp2cp)
|
||||
mpp50 50 gpio, ge1(rxclk), mss_i2c(sda), spi1(csn0), uart2(txd), uart0(rxd), xg(mdio), sdio(pwr11)
|
||||
mpp51 51 gpio, ge1(rxd0), mss_i2c(sck), spi1(csn1), uart2(rxd), uart0(cts), sdio(pwr10)
|
||||
mpp52 52 gpio, ge1(rxd1), synce1(clk), synce2(clk), spi1(csn2), uart1(cts), led(clk), pcie(rstoutn), pcie0(clkreq)
|
||||
mpp53 53 gpio, ge1(rxd2), ptp(clk), spi1(csn3), uart1(rxd), led(stb), sdio(led)
|
||||
mpp54 54 gpio, ge1(rxd3), synce2(clk), ptp(pclk_out), synce1(clk), led(data), sdio(hw_rst), sdio_wp(wr_protect)
|
||||
mpp55 55 gpio, ge1(rxctl_rxdv), ptp(pulse), sdio(led), sdio_cd(card_detect)
|
||||
mpp56 56 gpio, tdm(drx), au(i2sdo_spdifo), spi0(clk), uart1(rxd), sata1(present_act), sdio(clk)
|
||||
mpp57 57 gpio, mss_i2c(sda), ptp(pclk_out), tdm(intn), au(i2sbclk), spi0(mosi), uart1(txd), sata0(present_act), sdio(cmd)
|
||||
mpp58 58 gpio, mss_i2c(sck), ptp(clk), tdm(rstn), au(i2sdi), spi0(miso), uart1(cts), led(clk), sdio(d0)
|
||||
mpp59 59 gpio, mss_gpio7, synce2(clk), tdm(fsync), au(i2slrclk), spi0(csn0), uart0(cts), led(stb), uart1(txd), sdio(d1)
|
||||
mpp60 60 gpio, mss_gpio6, ptp(pulse), tdm(dtx), au(i2smclk), spi0(csn1), uart0(rts), led(data), uart1(rxd), sdio(d2)
|
||||
mpp61 61 gpio, mss_gpio5, ptp(clk), tdm(pclk), au(i2sextclk), spi0(csn2), uart0(txd), uart2(txd), sata1(present_act), ge(mdio), sdio(d3)
|
||||
mpp62 62 gpio, mss_gpio4, synce1(clk), ptp(pclk_out), sata1(present_act), spi0(csn3), uart0(rxd), uart2(rxd), sata0(present_act), ge(mdc)
|
||||
|
||||
GPIO:
|
||||
-----
|
||||
|
||||
For common binding part and usage, refer to
|
||||
Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "marvell,armada-8k-gpio"
|
||||
|
||||
- offset: offset address inside the syscon block
|
||||
|
||||
Example:
|
||||
|
||||
CP110_LABEL(syscon0): system-controller@440000 {
|
||||
compatible = "syscon", "simple-mfd";
|
||||
reg = <0x440000 0x1000>;
|
||||
|
||||
CP110_LABEL(clk): clock {
|
||||
compatible = "marvell,cp110-clock";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
|
||||
CP110_LABEL(pinctrl): pinctrl {
|
||||
compatible = "marvell,armada-8k-cpm-pinctrl";
|
||||
};
|
||||
|
||||
CP110_LABEL(gpio1): gpio@100 {
|
||||
compatible = "marvell,armada-8k-gpio";
|
||||
offset = <0x100>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>;
|
||||
};
|
||||
|
||||
};
|
||||
|
|
@ -163,7 +163,6 @@ examples:
|
|||
method = "smc";
|
||||
};
|
||||
|
||||
|
||||
- |+
|
||||
|
||||
// Case 3: PSCI v0.2 and PSCI v0.1.
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ properties:
|
|||
maximum: 20000000
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-fA-F]+$":
|
||||
"@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,94 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bus/cznic,moxtet.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Turris Moxtet SPI bus
|
||||
|
||||
maintainers:
|
||||
- Marek Behún <kabel@kernel.org>
|
||||
|
||||
description: >
|
||||
Turris Mox module status and configuration bus (over SPI)
|
||||
|
||||
The driver finds the devices connected to the bus by itself, but it may be
|
||||
needed to reference some of them from other parts of the device tree. In that
|
||||
case the devices can be defined as subnodes of the moxtet node.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cznic,moxtet
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
spi-cpol: true
|
||||
|
||||
spi-cpha: true
|
||||
|
||||
spi-max-frequency: true
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
"#interrupt-cells":
|
||||
const: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- spi-cpol
|
||||
- spi-cpha
|
||||
- interrupts
|
||||
- interrupt-controller
|
||||
- "#interrupt-cells"
|
||||
|
||||
additionalProperties:
|
||||
type: object
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
moxtet@1 {
|
||||
compatible = "cznic,moxtet";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gpiosb>;
|
||||
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
gpio@0 {
|
||||
compatible = "cznic,moxtet-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -70,7 +70,7 @@ properties:
|
|||
- const: ahb
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]+$":
|
||||
"@[0-9a-f]+$":
|
||||
description: Devices attached to the bus
|
||||
type: object
|
||||
|
||||
|
|
|
|||
|
|
@ -1,46 +0,0 @@
|
|||
Turris Mox module status and configuration bus (over SPI)
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "cznic,moxtet"
|
||||
- #address-cells : Has to be 1
|
||||
- #size-cells : Has to be 0
|
||||
- spi-cpol : Required inverted clock polarity
|
||||
- spi-cpha : Required shifted clock phase
|
||||
- interrupts : Must contain reference to the shared interrupt line
|
||||
- interrupt-controller : Required
|
||||
- #interrupt-cells : Has to be 1
|
||||
|
||||
For other required and optional properties of SPI slave nodes please refer to
|
||||
../spi/spi-bus.txt.
|
||||
|
||||
Required properties of subnodes:
|
||||
- reg : Should be position on the Moxtet bus (how many Moxtet
|
||||
modules are between this module and CPU module, so
|
||||
either 0 or a positive integer)
|
||||
|
||||
The driver finds the devices connected to the bus by itself, but it may be
|
||||
needed to reference some of them from other parts of the device tree. In that
|
||||
case the devices can be defined as subnodes of the moxtet node.
|
||||
|
||||
Example:
|
||||
|
||||
moxtet@1 {
|
||||
compatible = "cznic,moxtet";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gpiosb>;
|
||||
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
moxtet_sfp: gpio@0 {
|
||||
compatible = "cznic,moxtet-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0>;
|
||||
}
|
||||
};
|
||||
|
|
@ -44,7 +44,7 @@ properties:
|
|||
Contains the firewall ID associated to the peripheral.
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]+$":
|
||||
"@[0-9a-f]+$":
|
||||
description: Peripherals
|
||||
type: object
|
||||
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@ properties:
|
|||
Contains the firewall ID associated to the peripheral.
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]+$":
|
||||
"@[0-9a-f]+$":
|
||||
description: Peripherals
|
||||
type: object
|
||||
|
||||
|
|
|
|||
|
|
@ -132,7 +132,6 @@ examples:
|
|||
"ahb_mp", "ahb_mali400";
|
||||
};
|
||||
|
||||
|
||||
- |
|
||||
clk@1c20068 {
|
||||
#clock-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,54 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/marvell,ap80x-clock.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Armada AP80x System Controller Clocks
|
||||
|
||||
maintainers:
|
||||
- Gregory Clement <gregory.clement@bootlin.com>
|
||||
- Miquel Raynal <miquel.raynal@bootlin.com>
|
||||
|
||||
description: >
|
||||
The AP806/AP807 is one of the two core HW blocks of the Marvell Armada
|
||||
7K/8K/931x SoCs. It contains system controllers, which provide several
|
||||
registers giving access to numerous features: clocks, pin-muxing and many
|
||||
other SoC configuration items.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,ap806-clock
|
||||
- marvell,ap806-cpu-clock
|
||||
- marvell,ap807-clock
|
||||
- marvell,ap807-cpu-clock
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: cluster 0 parent clock phandle
|
||||
- description: cluster 1 parent clock phandle
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#clock-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- marvell,ap806-cpu-clock
|
||||
- marvell,ap807-cpu-clock
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/marvell,cp110-clock.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Armada CP110 System Controller Clocks
|
||||
|
||||
maintainers:
|
||||
- Gregory Clement <gregory.clement@bootlin.com>
|
||||
- Miquel Raynal <miquel.raynal@bootlin.com>
|
||||
|
||||
description: >
|
||||
The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K/931x
|
||||
SoCs. It contains system controllers, which provide several registers giving
|
||||
access to numerous features: clocks, pin-muxing and many other SoC
|
||||
configuration items.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: marvell,cp110-clock
|
||||
|
||||
"#clock-cells":
|
||||
const: 2
|
||||
description: >
|
||||
The first cell must be 0 or 1. 0 for the core clocks and 1 for the
|
||||
gateable clocks. The second cell identifies the particular core clock or
|
||||
gateable clocks.
|
||||
|
||||
The following clocks are available:
|
||||
|
||||
- Core clocks
|
||||
- 0 0 APLL
|
||||
- 0 1 PPv2 core
|
||||
- 0 2 EIP
|
||||
- 0 3 Core
|
||||
- 0 4 NAND core
|
||||
- 0 5 SDIO core
|
||||
|
||||
- Gateable clocks
|
||||
- 1 0 Audio
|
||||
- 1 1 Comm Unit
|
||||
- 1 2 NAND
|
||||
- 1 3 PPv2
|
||||
- 1 4 SDIO
|
||||
- 1 5 MG Domain
|
||||
- 1 6 MG Core
|
||||
- 1 7 XOR1
|
||||
- 1 8 XOR0
|
||||
- 1 9 GOP DP
|
||||
- 1 11 PCIe x1 0
|
||||
- 1 12 PCIe x1 1
|
||||
- 1 13 PCIe x4
|
||||
- 1 14 PCIe / XOR
|
||||
- 1 15 SATA
|
||||
- 1 16 SATA USB
|
||||
- 1 17 Main
|
||||
- 1 18 SD/MMC/GOP
|
||||
- 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART)
|
||||
- 1 22 USB3H0
|
||||
- 1 23 USB3H1
|
||||
- 1 24 USB3 Device
|
||||
- 1 25 EIP150
|
||||
- 1 26 EIP197
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#clock-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
|
@ -37,7 +37,7 @@ properties:
|
|||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
"#reset-cells":
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
nvidia,external-memory-controller:
|
||||
|
|
@ -46,7 +46,7 @@ properties:
|
|||
phandle of the external memory controller node
|
||||
|
||||
patternProperties:
|
||||
"^emc-timings-[0-9]+$":
|
||||
'^emc-timings-[0-9]+$':
|
||||
type: object
|
||||
properties:
|
||||
nvidia,ram-code:
|
||||
|
|
@ -56,7 +56,7 @@ patternProperties:
|
|||
this timing set is used for
|
||||
|
||||
patternProperties:
|
||||
"^timing-[0-9]+$":
|
||||
'^timing-[0-9]+$':
|
||||
type: object
|
||||
properties:
|
||||
clock-frequency:
|
||||
|
|
@ -94,7 +94,7 @@ required:
|
|||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- "#reset-cells"
|
||||
- '#reset-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -39,11 +39,11 @@ properties:
|
|||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
"#reset-cells":
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
"^(sclk)|(pll-[cem])$":
|
||||
'^(sclk)|(pll-[cem])$':
|
||||
type: object
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -76,7 +76,7 @@ required:
|
|||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- "#reset-cells"
|
||||
- '#reset-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ title: Qualcomm RPM Clock Controller
|
|||
|
||||
maintainers:
|
||||
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
description: |
|
||||
The clock enumerators are defined in <dt-bindings/clock/qcom,rpmcc.h> and
|
||||
|
|
|
|||
|
|
@ -99,7 +99,6 @@ properties:
|
|||
the datasheet.
|
||||
const: 1
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@ properties:
|
|||
- xlnx,clocking-wizard-v6.0
|
||||
- xlnx,versal-clk-wizard
|
||||
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -121,5 +121,4 @@ examples:
|
|||
};
|
||||
};
|
||||
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -121,5 +121,4 @@ examples:
|
|||
};
|
||||
};
|
||||
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -142,7 +142,6 @@ then:
|
|||
reset-names:
|
||||
minItems: 2
|
||||
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -25,7 +25,6 @@ description: |
|
|||
M |-------|______|----|____________| |________________| | |
|
||||
___|__________________________________________________________|_______________|
|
||||
|
||||
|
||||
VIU: Video Input Unit
|
||||
---------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -56,22 +56,12 @@ properties:
|
|||
- const: cec
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: CEC TX interrupt
|
||||
- description: CEC RX interrupt
|
||||
- description: CEC stuck at low interrupt
|
||||
- description: Wake-up interrupt
|
||||
- description: Hotplug connected interrupt
|
||||
- description: Hotplug removed interrupt
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: cec-tx
|
||||
- const: cec-rx
|
||||
- const: cec-low
|
||||
- const: wakeup
|
||||
- const: hpd-connected
|
||||
- const: hpd-removed
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
|
||||
ddc:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
|
@ -112,6 +102,61 @@ required:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm2711-hdmi0
|
||||
- brcm,bcm2711-hdmi1
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
items:
|
||||
- description: CEC TX interrupt
|
||||
- description: CEC RX interrupt
|
||||
- description: CEC stuck at low interrupt
|
||||
- description: Wake-up interrupt
|
||||
- description: Hotplug connected interrupt
|
||||
- description: Hotplug removed interrupt
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: cec-tx
|
||||
- const: cec-rx
|
||||
- const: cec-low
|
||||
- const: wakeup
|
||||
- const: hpd-connected
|
||||
- const: hpd-removed
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm2712-hdmi0
|
||||
- brcm,bcm2712-hdmi1
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
items:
|
||||
- description: CEC TX interrupt
|
||||
- description: CEC RX interrupt
|
||||
- description: CEC stuck at low interrupt
|
||||
- description: Hotplug connected interrupt
|
||||
- description: Hotplug removed interrupt
|
||||
interrupts-names:
|
||||
items:
|
||||
- const: cec-tx
|
||||
- const: cec-rx
|
||||
- const: cec-low
|
||||
- const: hpd-connected
|
||||
- const: hpd-removed
|
||||
|
||||
required:
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
hdmi0: hdmi@7ef00700 {
|
||||
|
|
@ -136,6 +181,9 @@ examples:
|
|||
"hd";
|
||||
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
|
||||
clock-names = "hdmi", "bvb", "audio", "cec";
|
||||
interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
|
||||
interrupt-names = "cec-tx", "cec-rx", "cec-low", "wakeup",
|
||||
"hpd-connected", "hpd-removed";
|
||||
resets = <&dvp 0>;
|
||||
ddc = <&ddc0>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -20,11 +20,20 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description: Core Clock
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
@ -33,18 +42,69 @@ required:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
if:
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm2711-hvs
|
||||
- brcm,bcm2712-hvs
|
||||
const: brcm,bcm2711-hvs
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Core Clock
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
clock-names: false
|
||||
interrupt-names: false
|
||||
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm2712-hvs
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: disp
|
||||
interrupts:
|
||||
items:
|
||||
- description: Channel 0 End of frame
|
||||
- description: Channel 1 End of frame
|
||||
- description: Channel 2 End of frame
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: ch0-eof
|
||||
- const: ch1-eof
|
||||
- const: ch2-eof
|
||||
required:
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupt-names
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm2835-hvs
|
||||
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
clock-names: false
|
||||
interrupt-names: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
hvs@7e400000 {
|
||||
|
|
|
|||
|
|
@ -156,7 +156,6 @@ else:
|
|||
adi,input-style: false
|
||||
adi,input-justification: false
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -131,7 +131,6 @@ required:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
examples:
|
||||
- |
|
||||
lvds-encoder {
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Parade PS8622/PS8625 DisplayPort to LVDS Converter
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Silicon Image SiI8620 HDMI/MHL bridge
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -123,7 +123,6 @@ properties:
|
|||
- required:
|
||||
- port@1
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -54,7 +54,6 @@ examples:
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
|
||||
display@0{
|
||||
compatible = "waveshare,rpi-lcd-35", "ilitek,ili9486";
|
||||
reg = <0>;
|
||||
|
|
|
|||
|
|
@ -133,7 +133,6 @@ properties:
|
|||
For GMU attached devices a phandle to the GMU device that will
|
||||
control the power for the GPU.
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Qualcomm SM8750 Display MDSS
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
description:
|
||||
SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
|
||||
|
|
|
|||
|
|
@ -41,7 +41,6 @@ description: |
|
|||
| | | v | |
|
||||
+-------+----------+-------------------------------------+----------+
|
||||
|
||||
|
||||
The following is the panel timings shown with time on the x-axis.
|
||||
This matches the timing diagrams often found in data sheets.
|
||||
|
||||
|
|
|
|||
|
|
@ -38,7 +38,6 @@ description: |+
|
|||
The serial protocol has line names that resemble I2C but the
|
||||
protocol is not I2C but 3WIRE SPI.
|
||||
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
|
|
|||
|
|
@ -125,7 +125,6 @@ examples:
|
|||
power-domains = <&power RK3588_PD_VO0>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -181,7 +181,6 @@ allOf:
|
|||
required:
|
||||
- amlogic,pipeline
|
||||
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,59 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dma/apm,xgene-storm-dma.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: APM X-Gene Storm SoC DMA
|
||||
|
||||
maintainers:
|
||||
- Khuong Dinh <khuong@os.amperecomputing.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: apm,xgene-storm-dma
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: DMA control and status registers
|
||||
- description: Descriptor ring control and status registers
|
||||
- description: Descriptor ring command registers
|
||||
- description: SoC efuse registers
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: DMA error reporting interrupt
|
||||
- description: DMA channel 0 completion interrupt
|
||||
- description: DMA channel 1 completion interrupt
|
||||
- description: DMA channel 2 completion interrupt
|
||||
- description: DMA channel 3 completion interrupt
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
dma@1f270000 {
|
||||
compatible = "apm,xgene-storm-dma";
|
||||
reg = <0x1f270000 0x10000>,
|
||||
<0x1f200000 0x10000>,
|
||||
<0x1b000000 0x400000>,
|
||||
<0x1054a000 0x100>;
|
||||
interrupts = <0x0 0x82 0x4>,
|
||||
<0x0 0xb8 0x4>,
|
||||
<0x0 0xb9 0x4>,
|
||||
<0x0 0xba 0x4>,
|
||||
<0x0 0xbb 0x4>;
|
||||
dma-coherent;
|
||||
clocks = <&dmaclk 0>;
|
||||
};
|
||||
|
|
@ -1,47 +0,0 @@
|
|||
Applied Micro X-Gene SoC DMA nodes
|
||||
|
||||
DMA nodes are defined to describe on-chip DMA interfaces in
|
||||
APM X-Gene SoC.
|
||||
|
||||
Required properties for DMA interfaces:
|
||||
- compatible: Should be "apm,xgene-dma".
|
||||
- device_type: set to "dma".
|
||||
- reg: Address and length of the register set for the device.
|
||||
It contains the information of registers in the following order:
|
||||
1st - DMA control and status register address space.
|
||||
2nd - Descriptor ring control and status register address space.
|
||||
3rd - Descriptor ring command register address space.
|
||||
4th - Soc efuse register address space.
|
||||
- interrupts: DMA has 5 interrupts sources. 1st interrupt is
|
||||
DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts
|
||||
are completion interrupts for each DMA channels.
|
||||
- clocks: Reference to the clock entry.
|
||||
|
||||
Optional properties:
|
||||
- dma-coherent : Present if dma operations are coherent
|
||||
|
||||
Example:
|
||||
dmaclk: dmaclk@1f27c000 {
|
||||
compatible = "apm,xgene-device-clock";
|
||||
#clock-cells = <1>;
|
||||
clocks = <&socplldiv2 0>;
|
||||
reg = <0x0 0x1f27c000 0x0 0x1000>;
|
||||
reg-names = "csr-reg";
|
||||
clock-output-names = "dmaclk";
|
||||
};
|
||||
|
||||
dma: dma@1f270000 {
|
||||
compatible = "apm,xgene-storm-dma";
|
||||
device_type = "dma";
|
||||
reg = <0x0 0x1f270000 0x0 0x10000>,
|
||||
<0x0 0x1f200000 0x0 0x10000>,
|
||||
<0x0 0x1b000000 0x0 0x400000>,
|
||||
<0x0 0x1054a000 0x0 0x100>;
|
||||
interrupts = <0x0 0x82 0x4>,
|
||||
<0x0 0xb8 0x4>,
|
||||
<0x0 0xb9 0x4>,
|
||||
<0x0 0xba 0x4>,
|
||||
<0x0 0xbb 0x4>;
|
||||
dma-coherent;
|
||||
clocks = <&dmaclk 0>;
|
||||
};
|
||||
|
|
@ -22,7 +22,6 @@ properties:
|
|||
- renesas,r9a06g032-dma
|
||||
- const: renesas,rzn1-dma
|
||||
|
||||
|
||||
"#dma-cells":
|
||||
minimum: 3
|
||||
maximum: 4
|
||||
|
|
|
|||
|
|
@ -120,7 +120,6 @@ properties:
|
|||
- description: LCPA memory base, deprecated, use eSRAM pool instead
|
||||
deprecated: true
|
||||
|
||||
|
||||
reg-names:
|
||||
oneOf:
|
||||
- items:
|
||||
|
|
|
|||
|
|
@ -48,7 +48,6 @@ description: |
|
|||
by transfer completion. This must only be used on channels
|
||||
managing transfers for STM32 USART/UART.
|
||||
|
||||
|
||||
maintainers:
|
||||
- Amelie Delaunay <amelie.delaunay@foss.st.com>
|
||||
|
||||
|
|
|
|||
|
|
@ -120,7 +120,8 @@ The following order of properties in device nodes is preferred:
|
|||
4. Standard/common properties (defined by common bindings, e.g. without
|
||||
vendor-prefixes)
|
||||
5. Vendor-specific properties
|
||||
6. "status" (if applicable)
|
||||
6. "status" (if applicable), preceded by a blank line if there is content
|
||||
before the property
|
||||
7. Child nodes, where each node is preceded with a blank line
|
||||
|
||||
The "status" property is by default "okay", thus it can be omitted.
|
||||
|
|
@ -150,6 +151,7 @@ Example::
|
|||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
vendor,custom-property = <2>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
child_node: child-class@100 {
|
||||
|
|
@ -165,6 +167,7 @@ Example::
|
|||
vdd-1v8-supply = <&board_vreg4>;
|
||||
vdd-3v3-supply = <&board_vreg2>;
|
||||
vdd-12v-supply = <&board_vreg3>;
|
||||
|
||||
status = "okay";
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Altera SoCFPGA ECC Manager
|
||||
|
||||
maintainers:
|
||||
- Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
- Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
|
||||
|
||||
description:
|
||||
This binding describes the device tree nodes required for the Altera SoCFPGA
|
||||
|
|
|
|||
|
|
@ -97,7 +97,6 @@ patternProperties:
|
|||
- reg
|
||||
- memory-controller
|
||||
|
||||
|
||||
'^edacpmd@':
|
||||
description: PMD subnode
|
||||
type: object
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@ properties:
|
|||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- anvo,anv32c81w
|
||||
- anvo,anv32e61w
|
||||
- atmel,at25256B
|
||||
- fujitsu,mb85rs1mt
|
||||
|
|
|
|||
|
|
@ -23,7 +23,6 @@ description: |
|
|||
The authoritative guest-side hardware interface documentation to the fw_cfg
|
||||
device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree.
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qemu,fw-cfg-mmio
|
||||
|
|
|
|||
|
|
@ -18,7 +18,6 @@ description: |
|
|||
- Supported Use Models
|
||||
- Constraints
|
||||
|
||||
|
||||
Introduction
|
||||
============
|
||||
|
||||
|
|
@ -31,7 +30,6 @@ description: |
|
|||
document isn't a replacement for any manufacturers specifications for FPGA
|
||||
usage.
|
||||
|
||||
|
||||
Terminology
|
||||
===========
|
||||
|
||||
|
|
@ -108,7 +106,6 @@ description: |
|
|||
a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be
|
||||
reprogrammed independently while the rest of the system continues to function.
|
||||
|
||||
|
||||
Sequence
|
||||
========
|
||||
|
||||
|
|
@ -124,7 +121,6 @@ description: |
|
|||
When the overlay is removed, the child nodes will be removed and the FPGA Region
|
||||
will disable the bridges.
|
||||
|
||||
|
||||
FPGA Region
|
||||
===========
|
||||
|
||||
|
|
@ -170,7 +166,6 @@ description: |
|
|||
hardware bridges remain enabled. The PR regions' bridges will be FPGA bridges
|
||||
within the static image of the FPGA.
|
||||
|
||||
|
||||
Supported Use Models
|
||||
====================
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,59 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/fpga/lattice,ice40-fpga-mgr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lattice iCE40 FPGA Manager
|
||||
|
||||
maintainers:
|
||||
- Joel Holdsworth <joel@airwebreathe.org.uk>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: lattice,ice40-fpga-mgr
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
minimum: 1000000
|
||||
maximum: 25000000
|
||||
|
||||
cdone-gpios:
|
||||
maxItems: 1
|
||||
description: GPIO input connected to CDONE pin
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
Active-low GPIO output connected to CRESET_B pin. Note that unless the
|
||||
GPIO is held low during startup, the FPGA will enter Master SPI mode and
|
||||
drive SCK with a clock signal potentially jamming other devices on the bus
|
||||
until the firmware is loaded.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- spi-max-frequency
|
||||
- cdone-gpios
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
fpga@0 {
|
||||
compatible = "lattice,ice40-fpga-mgr";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
Lattice iCE40 FPGA Manager
|
||||
|
||||
Required properties:
|
||||
- compatible: Should contain "lattice,ice40-fpga-mgr"
|
||||
- reg: SPI chip select
|
||||
- spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
|
||||
- cdone-gpios: GPIO input connected to CDONE pin
|
||||
- reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
|
||||
that unless the GPIO is held low during startup, the
|
||||
FPGA will enter Master SPI mode and drive SCK with a
|
||||
clock signal potentially jamming other devices on the
|
||||
bus until the firmware is loaded.
|
||||
|
||||
Example:
|
||||
fpga: fpga@0 {
|
||||
compatible = "lattice,ice40-fpga-mgr";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -66,5 +66,4 @@ examples:
|
|||
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@ description: |
|
|||
___ ________
|
||||
chip select# |___________________|
|
||||
|
||||
|
||||
maintainers:
|
||||
- Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ properties:
|
|||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
|
|
@ -35,7 +36,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
"^(?!gpio@)[^@]+@[0-9]+$":
|
||||
'^(?!gpio@)[^@]+@[0-9]+$':
|
||||
type: object
|
||||
properties:
|
||||
fsl,pinmux-ids:
|
||||
|
|
@ -93,7 +94,7 @@ patternProperties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
"^gpio@[0-9]+$":
|
||||
'^gpio@[0-9]+$':
|
||||
type: object
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -110,10 +111,10 @@ patternProperties:
|
|||
|
||||
interrupt-controller: true
|
||||
|
||||
"#interrupt-cells":
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
|
||||
"#gpio-cells":
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
gpio-controller: true
|
||||
|
|
@ -123,8 +124,8 @@ patternProperties:
|
|||
- reg
|
||||
- interrupts
|
||||
- interrupt-controller
|
||||
- "#interrupt-cells"
|
||||
- "#gpio-cells"
|
||||
- '#interrupt-cells'
|
||||
- '#gpio-cells'
|
||||
- gpio-controller
|
||||
|
||||
additionalProperties: false
|
||||
|
|
|
|||
|
|
@ -111,8 +111,8 @@ additionalProperties: false
|
|||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ properties:
|
|||
- mediatek,mt8183-mali
|
||||
- mediatek,mt8183b-mali
|
||||
- mediatek,mt8186-mali
|
||||
- mediatek,mt8365-mali
|
||||
- realtek,rtd1619-mali
|
||||
- renesas,r9a07g044-mali
|
||||
- renesas,r9a07g054-mali
|
||||
|
|
|
|||
|
|
@ -81,7 +81,6 @@ required:
|
|||
- compatible
|
||||
- reg
|
||||
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -93,7 +93,6 @@ allOf:
|
|||
adi,fault-q:
|
||||
default: 4
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -45,7 +45,6 @@ properties:
|
|||
- ti,tmp461
|
||||
- winbond,w83l771
|
||||
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: |
|
||||
|
|
|
|||
|
|
@ -20,7 +20,6 @@ description: |
|
|||
https://www.ti.com/lit/gpn/tmp513
|
||||
https://www.ti.com/lit/gpn/tmp512
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@ description: |
|
|||
Datasheets:
|
||||
https://www.ti.com/lit/gpn/tps23861
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
|
|
|
|||
|
|
@ -27,7 +27,6 @@ description: |+
|
|||
| '------' | | dev | | dev | | dev |
|
||||
'------------' '-----' '-----' '-----'
|
||||
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i2c/i2c-mux.yaml#
|
||||
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ title: Qualcomm Universal Peripheral (QUP) I2C controller
|
|||
maintainers:
|
||||
- Andy Gross <agross@kernel.org>
|
||||
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i2c/i2c-controller.yaml#
|
||||
|
|
|
|||
|
|
@ -64,7 +64,6 @@ patternProperties:
|
|||
required:
|
||||
- reg
|
||||
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -16,7 +16,6 @@ description: |
|
|||
can be selected by writing the appropriate device number to an I2C config
|
||||
register.
|
||||
|
||||
|
||||
+--------------------------------------------------+
|
||||
| Mule |
|
||||
0x18| +---------------+ |
|
||||
|
|
@ -34,7 +33,6 @@ description: |
|
|||
| |__/ +--------+ |
|
||||
+--------------------------------------------------+
|
||||
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i2c/i2c-mux.yaml#
|
||||
|
||||
|
|
|
|||
|
|
@ -30,7 +30,6 @@ description: |
|
|||
* https://www.analog.com/en/products/adaq4380-4.html
|
||||
* https://www.analog.com/en/products/adaq4381-4.html
|
||||
|
||||
|
||||
$ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -166,7 +166,6 @@ properties:
|
|||
An example of backend can be found at
|
||||
http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html
|
||||
|
||||
|
||||
patternProperties:
|
||||
"^channel@[1-8]$":
|
||||
type: object
|
||||
|
|
|
|||
|
|
@ -48,7 +48,6 @@ properties:
|
|||
enum: [2500000, 4096000]
|
||||
default: 4096000
|
||||
|
||||
|
||||
'#io-channel-cells':
|
||||
const: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -57,7 +57,6 @@ properties:
|
|||
description: External clock source when not using crystal
|
||||
maxItems: 1
|
||||
|
||||
|
||||
"#clock-cells":
|
||||
description:
|
||||
ADE9000 can provide clock output via CLKOUT pin with external buffer.
|
||||
|
|
|
|||
|
|
@ -36,7 +36,6 @@ properties:
|
|||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -456,7 +456,6 @@ patternProperties:
|
|||
items:
|
||||
minimum: 40
|
||||
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -57,7 +57,6 @@ description: |
|
|||
4 | batt_dischrg_i
|
||||
5 | ts_v
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
|
|
|
|||
|
|
@ -29,7 +29,6 @@ description: |
|
|||
|
|
||||
GND
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: voltage-divider
|
||||
|
|
|
|||
|
|
@ -37,7 +37,6 @@ required:
|
|||
- compatible
|
||||
- reg
|
||||
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,6 @@ maintainers:
|
|||
description: |
|
||||
Pressure sensor from Murata with SPI and I2C bus interfaces.
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: murata,zpa2326
|
||||
|
|
|
|||
|
|
@ -78,7 +78,6 @@ properties:
|
|||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
|
||||
semtech,ph01-resolution:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [8, 16, 32, 64, 128, 256, 512, 1024]
|
||||
|
|
|
|||
|
|
@ -39,7 +39,6 @@ $defs:
|
|||
- reg
|
||||
- adi,sensor-type
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
|
|
@ -88,7 +87,7 @@ properties:
|
|||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^thermocouple@":
|
||||
'^thermocouple@':
|
||||
$ref: '#/$defs/sensor-node'
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
@ -146,7 +145,7 @@ patternProperties:
|
|||
required:
|
||||
- adi,custom-thermocouple
|
||||
|
||||
"^diode@":
|
||||
'^diode@':
|
||||
$ref: '#/$defs/sensor-node'
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
@ -191,7 +190,7 @@ patternProperties:
|
|||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0
|
||||
|
||||
"^rtd@":
|
||||
'^rtd@':
|
||||
$ref: '#/$defs/sensor-node'
|
||||
unevaluatedProperties: false
|
||||
description: RTD sensor.
|
||||
|
|
@ -280,7 +279,7 @@ patternProperties:
|
|||
type: boolean
|
||||
|
||||
dependencies:
|
||||
adi,current-rotate: [ "adi,rsense-share" ]
|
||||
adi,current-rotate: [ 'adi,rsense-share' ]
|
||||
|
||||
- if:
|
||||
properties:
|
||||
|
|
@ -290,7 +289,7 @@ patternProperties:
|
|||
required:
|
||||
- adi,custom-rtd
|
||||
|
||||
"^thermistor@":
|
||||
'^thermistor@':
|
||||
$ref: '#/$defs/sensor-node'
|
||||
unevaluatedProperties: false
|
||||
description: Thermistor sensor.
|
||||
|
|
@ -364,7 +363,7 @@ patternProperties:
|
|||
- adi,rsense-handle
|
||||
|
||||
dependencies:
|
||||
adi,current-rotate: [ "adi,rsense-share" ]
|
||||
adi,current-rotate: [ 'adi,rsense-share' ]
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
|
|
@ -392,7 +391,7 @@ patternProperties:
|
|||
required:
|
||||
- adi,custom-thermistor
|
||||
|
||||
"^adc@":
|
||||
'^adc@':
|
||||
$ref: '#/$defs/sensor-node'
|
||||
unevaluatedProperties: false
|
||||
description: Direct ADC sensor.
|
||||
|
|
@ -407,7 +406,7 @@ patternProperties:
|
|||
description: Whether the sensor is single-ended.
|
||||
type: boolean
|
||||
|
||||
"^temp@":
|
||||
'^temp@':
|
||||
$ref: '#/$defs/sensor-node'
|
||||
unevaluatedProperties: false
|
||||
description: Active analog temperature sensor.
|
||||
|
|
@ -437,7 +436,7 @@ patternProperties:
|
|||
required:
|
||||
- adi,custom-temp
|
||||
|
||||
"^rsense@":
|
||||
'^rsense@':
|
||||
$ref: '#/$defs/sensor-node'
|
||||
unevaluatedProperties: false
|
||||
description: Sense resistor sensor.
|
||||
|
|
@ -476,7 +475,7 @@ allOf:
|
|||
- adi,ltc2984
|
||||
then:
|
||||
patternProperties:
|
||||
"^temp@": false
|
||||
'^temp@': false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Cypress All Points Addressable (APA) I2C Touchpad / Trackpad
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -37,7 +37,6 @@ examples:
|
|||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: ST-Microelectronics FingerTip touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
description:
|
||||
The ST-Microelectronics FingerTip device provides a basic touchscreen
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Qualcomm Interconnect Bandwidth Monitor
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
description: |
|
||||
Bandwidth Monitor measures current throughput on buses between various NoC
|
||||
|
|
|
|||
|
|
@ -122,7 +122,6 @@ allOf:
|
|||
required:
|
||||
- reg
|
||||
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -305,7 +305,6 @@ examples:
|
|||
};
|
||||
};
|
||||
|
||||
|
||||
device@0 {
|
||||
reg = <0 4>;
|
||||
interrupts = <1 1 4 &part0>;
|
||||
|
|
|
|||
|
|
@ -54,7 +54,6 @@ properties:
|
|||
| |---...
|
||||
+---------+---module31
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -34,8 +34,6 @@ properties:
|
|||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ properties:
|
|||
- fsl,imx8qm-irqsteer
|
||||
- fsl,imx8qxp-irqsteer
|
||||
- fsl,imx94-irqsteer
|
||||
- fsl,imx95-irqsteer
|
||||
- const: fsl,imx-irqsteer
|
||||
|
||||
reg:
|
||||
|
|
@ -87,6 +88,7 @@ allOf:
|
|||
- fsl,imx8mp-irqsteer
|
||||
- fsl,imx8qm-irqsteer
|
||||
- fsl,imx8qxp-irqsteer
|
||||
- fsl,imx95-irqsteer
|
||||
then:
|
||||
required:
|
||||
- power-domains
|
||||
|
|
|
|||
|
|
@ -14,7 +14,6 @@ description:
|
|||
Vybrid SoC's but is only really useful in dual core configurations (VF6xx
|
||||
which comes with a Cortex-A5/Cortex-M4 combination).
|
||||
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
|
|
|
|||
|
|
@ -78,7 +78,6 @@ required:
|
|||
- '#interrupt-cells'
|
||||
- loongson,parent_int_map
|
||||
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
if:
|
||||
|
|
|
|||
|
|
@ -18,7 +18,6 @@ description:
|
|||
flush command is executed. With CIRQ, MCUSYS can be completely turned off
|
||||
to improve the system power consumption without losing interrupts.
|
||||
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
|
|
|
|||
|
|
@ -26,7 +26,6 @@ properties:
|
|||
- mscc,ocelot-icpu-intr
|
||||
- mscc,serval-icpu-intr
|
||||
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -61,6 +61,7 @@ properties:
|
|||
- anlogic,dr1v90-plic
|
||||
- canaan,k210-plic
|
||||
- eswin,eic7700-plic
|
||||
- microchip,pic64gx-plic
|
||||
- sifive,fu540-c000-plic
|
||||
- spacemit,k1-plic
|
||||
- starfive,jh7100-plic
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: TI OMAP4 Wake-up Generator
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
description: >
|
||||
All TI OMAP4/5 (and their derivatives) are interrupt controllers that route
|
||||
|
|
|
|||
|
|
@ -640,7 +640,6 @@ examples:
|
|||
<&smmu1 7>;
|
||||
};
|
||||
|
||||
|
||||
/* SMMU with stream matching */
|
||||
smmu2: iommu@ba5f0000 {
|
||||
compatible = "arm,smmu-v1";
|
||||
|
|
@ -666,7 +665,6 @@ examples:
|
|||
iommus = <&smmu2 1 0x30>;
|
||||
};
|
||||
|
||||
|
||||
/* ARM MMU-500 with 10-bit stream ID input configuration */
|
||||
smmu3: iommu@ba600000 {
|
||||
compatible = "arm,mmu-500", "arm,smmu-v2";
|
||||
|
|
@ -687,8 +685,6 @@ examples:
|
|||
/* bus whose child devices emit one unique 10-bit stream
|
||||
ID each, but may master through multiple SMMU TBUs */
|
||||
iommu-map = <0 &smmu3 0 0x400>;
|
||||
|
||||
|
||||
};
|
||||
|
||||
- |+
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Qualcomm PM8058 PMIC LED
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
description: |
|
||||
The Qualcomm PM8058 contains an LED block for up to six LEDs:: three normal
|
||||
|
|
|
|||
|
|
@ -0,0 +1,62 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/apm,xgene-slimpro-mbox.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: APM X-Gene SLIMpro mailbox
|
||||
|
||||
maintainers:
|
||||
- Khuong Dinh <khuong@os.amperecomputing.com>
|
||||
|
||||
description:
|
||||
The APM X-Gene SLIMpro mailbox is used to communicate messages between
|
||||
the ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple
|
||||
interrupt based door bell mechanism and can exchange simple messages using the
|
||||
internal registers.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: apm,xgene-slimpro-mbox
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: mailbox channel 0 doorbell
|
||||
- description: mailbox channel 1 doorbell
|
||||
- description: mailbox channel 2 doorbell
|
||||
- description: mailbox channel 3 doorbell
|
||||
- description: mailbox channel 4 doorbell
|
||||
- description: mailbox channel 5 doorbell
|
||||
- description: mailbox channel 6 doorbell
|
||||
- description: mailbox channel 7 doorbell
|
||||
|
||||
'#mbox-cells':
|
||||
description: Number of mailbox channel.
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- '#mbox-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mailbox@10540000 {
|
||||
compatible = "apm,xgene-slimpro-mbox";
|
||||
reg = <0x10540000 0xa000>;
|
||||
#mbox-cells = <1>;
|
||||
interrupts = <0x0 0x0 0x4>,
|
||||
<0x0 0x1 0x4>,
|
||||
<0x0 0x2 0x4>,
|
||||
<0x0 0x3 0x4>,
|
||||
<0x0 0x4 0x4>,
|
||||
<0x0 0x5 0x4>,
|
||||
<0x0 0x6 0x4>,
|
||||
<0x0 0x7 0x4>;
|
||||
};
|
||||
|
|
@ -52,7 +52,6 @@ properties:
|
|||
- const: arm,mhu-doorbell
|
||||
- const: arm,primecell
|
||||
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -127,7 +127,6 @@ properties:
|
|||
- minimum: 0
|
||||
maximum: 124
|
||||
|
||||
|
||||
'#mbox-cells':
|
||||
description: |
|
||||
It is always set to 2. The first argument in the consumers 'mboxes'
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue