mirror of https://github.com/torvalds/linux.git
iommupt: Documentation fixes
Some adjustments pointed out by Randy: "decodes an full 64-bit" -> "decodes the full 64 bit" Correct the function parameter name for iova_to_phys() Use the recommended section heading style. Suggested-by: Randy Dunlap <rdunlap@infradead.org> Fixes:ab0b572847("genpt: Add Documentation/ files") Fixes:879ced2bab("iommupt: Add the AMD IOMMU v1 page table format") Fixes:9d4c274cd7("iommupt: Add iova_to_phys op") Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@ -10,9 +10,8 @@ Generic Radix Page Table
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.. kernel-doc:: drivers/iommu/generic_pt/pt_defs.h
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.. kernel-doc:: drivers/iommu/generic_pt/pt_defs.h
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:doc: Generic Page Table Language
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:doc: Generic Page Table Language
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-----
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Usage
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Usage
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-----
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=====
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Generic PT is structured as a multi-compilation system. Since each format
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Generic PT is structured as a multi-compilation system. Since each format
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provides an API using a common set of names there can be only one format active
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provides an API using a common set of names there can be only one format active
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@ -61,7 +60,6 @@ format-specific information.
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The implementation will further wrap struct pt_common in its own top-level
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The implementation will further wrap struct pt_common in its own top-level
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struct, such as struct pt_iommu_amdv1.
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struct, such as struct pt_iommu_amdv1.
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----------------------------------------------
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Format functions at the struct pt_common level
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Format functions at the struct pt_common level
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----------------------------------------------
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----------------------------------------------
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@ -69,13 +67,11 @@ Format functions at the struct pt_common level
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:identifiers:
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:identifiers:
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.. kernel-doc:: drivers/iommu/generic_pt/pt_common.h
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.. kernel-doc:: drivers/iommu/generic_pt/pt_common.h
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-----------------
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Iteration Helpers
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Iteration Helpers
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-----------------
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-----------------
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.. kernel-doc:: drivers/iommu/generic_pt/pt_iter.h
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.. kernel-doc:: drivers/iommu/generic_pt/pt_iter.h
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----------------
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Writing a Format
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Writing a Format
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----------------
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----------------
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@ -112,7 +108,6 @@ The generic tests are intended to prove out the format functions and give
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clearer failures to speed up finding the problems. Once those pass then the
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clearer failures to speed up finding the problems. Once those pass then the
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entire kunit suite should be run.
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entire kunit suite should be run.
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---------------------------
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IOMMU Invalidation Features
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IOMMU Invalidation Features
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---------------------------
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---------------------------
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@ -124,7 +119,7 @@ on its design. Every HW has its own approach on how to describe what has changed
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to have changed items removed from the TLB.
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to have changed items removed from the TLB.
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PT_FEAT_FLUSH_RANGE
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PT_FEAT_FLUSH_RANGE
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-------------------
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~~~~~~~~~~~~~~~~~~~
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PT_FEAT_FLUSH_RANGE is the easiest scheme to understand. It tries to generate a
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PT_FEAT_FLUSH_RANGE is the easiest scheme to understand. It tries to generate a
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single range invalidation for each operation, over-invalidating if there are
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single range invalidation for each operation, over-invalidating if there are
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@ -134,7 +129,7 @@ however, if pages have to be freed then page table pointers have to be cleaned
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from the walk cache. The range can start/end at any page boundary.
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from the walk cache. The range can start/end at any page boundary.
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PT_FEAT_FLUSH_RANGE_NO_GAPS
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PT_FEAT_FLUSH_RANGE_NO_GAPS
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---------------------------
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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PT_FEAT_FLUSH_RANGE_NO_GAPS is similar to PT_FEAT_FLUSH_RANGE; however, it tries
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PT_FEAT_FLUSH_RANGE_NO_GAPS is similar to PT_FEAT_FLUSH_RANGE; however, it tries
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to minimize the amount of impacted VA by issuing extra flush operations. This is
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to minimize the amount of impacted VA by issuing extra flush operations. This is
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@ -38,7 +38,7 @@ config IOMMU_PT_AMDV1
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help
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help
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iommu_domain implementation for the AMD v1 page table. AMDv1 is the
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iommu_domain implementation for the AMD v1 page table. AMDv1 is the
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"host" page table. It supports granular page sizes of almost every
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"host" page table. It supports granular page sizes of almost every
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power of 2 and decodes an full 64-bit IOVA space.
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power of 2 and decodes the full 64-bit IOVA space.
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Selected automatically by an IOMMU driver that uses this format.
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Selected automatically by an IOMMU driver that uses this format.
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@ -158,7 +158,7 @@ PT_MAKE_LEVELS(__iova_to_phys, __do_iova_to_phys);
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/**
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/**
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* iova_to_phys() - Return the output address for the given IOVA
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* iova_to_phys() - Return the output address for the given IOVA
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* @iommu_table: Table to query
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* @domain: Table to query
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* @iova: IO virtual address to query
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* @iova: IO virtual address to query
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*
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*
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* Determine the output address from the given IOVA. @iova may have any
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* Determine the output address from the given IOVA. @iova may have any
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