mirror of https://github.com/torvalds/linux.git
dt-bindings: timer: Correct indentation and style in DTS example
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20250107131024.246561-1-krzysztof.kozlowski@linaro.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Krzysztof Kozlowski
Daniel Lezcano
parent
7eb172143d
commit
53b552f1cc
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@ -50,7 +50,7 @@ examples:
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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timer@2c000600 {
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compatible = "arm,arm11mp-twd-timer";
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reg = <0x2c000600 0x20>;
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interrupts = <GIC_PPI 13 0xf01>;
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compatible = "arm,arm11mp-twd-timer";
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reg = <0x2c000600 0x20>;
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interrupts = <GIC_PPI 13 0xf01>;
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};
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@ -178,29 +178,29 @@ examples:
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7790-sysc.h>
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cmt0: timer@ffca0000 {
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compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
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reg = <0xffca0000 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 124>;
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clock-names = "fck";
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 124>;
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compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
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reg = <0xffca0000 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 124>;
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clock-names = "fck";
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 124>;
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
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reg = <0xe6130000 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 329>;
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clock-names = "fck";
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 329>;
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compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
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reg = <0xe6130000 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 329>;
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clock-names = "fck";
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 329>;
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};
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@ -38,9 +38,9 @@ examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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timer@e0180000 {
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compatible = "renesas,em-sti";
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reg = <0xe0180000 0x54>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sti_sclk>;
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clock-names = "sclk";
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compatible = "renesas,em-sti";
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reg = <0xe0180000 0x54>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sti_sclk>;
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clock-names = "sclk";
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};
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@ -66,11 +66,11 @@ examples:
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#include <dt-bindings/clock/r7s72100-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mtu2: timer@fcff0000 {
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compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
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reg = <0xfcff0000 0x400>;
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interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tgi0a";
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clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
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clock-names = "fck";
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power-domains = <&cpg_clocks>;
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compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
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reg = <0xfcff0000 0x400>;
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interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tgi0a";
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clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
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clock-names = "fck";
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power-domains = <&cpg_clocks>;
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};
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@ -71,9 +71,9 @@ examples:
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#include <dt-bindings/clock/r7s72100-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ostm0: timer@fcfec000 {
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compatible = "renesas,r7s72100-ostm", "renesas,ostm";
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reg = <0xfcfec000 0x30>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
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clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
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power-domains = <&cpg_clocks>;
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compatible = "renesas,r7s72100-ostm", "renesas,ostm";
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reg = <0xfcfec000 0x30>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
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clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
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power-domains = <&cpg_clocks>;
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};
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@ -122,15 +122,15 @@ examples:
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7779-sysc.h>
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tmu0: timer@ffd80000 {
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compatible = "renesas,tmu-r8a7779", "renesas,tmu";
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reg = <0xffd80000 0x30>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
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clock-names = "fck";
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power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
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#renesas,channels = <3>;
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compatible = "renesas,tmu-r8a7779", "renesas,tmu";
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reg = <0xffd80000 0x30>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
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clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
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clock-names = "fck";
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power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
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#renesas,channels = <3>;
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};
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@ -49,8 +49,8 @@ additionalProperties: false
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examples:
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- |
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tpu: tpu@ffffe0 {
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compatible = "renesas,tpu";
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reg = <0xffffe0 16>, <0xfffff0 12>;
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clocks = <&pclk>;
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clock-names = "fck";
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compatible = "renesas,tpu";
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reg = <0xffffe0 16>, <0xfffff0 12>;
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clocks = <&pclk>;
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clock-names = "fck";
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};
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@ -77,6 +77,6 @@ examples:
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<&cpu2intc 3>, <&cpu2intc 7>,
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<&cpu3intc 3>, <&cpu3intc 7>,
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<&cpu4intc 3>, <&cpu4intc 7>;
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reg = <0x2000000 0x10000>;
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reg = <0x2000000 0x10000>;
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};
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...
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