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drm/amdgpu/userq: rename suspend/resume callbacks 

Rename to map and umap to better align with what is happening
at the firmware level and remove the extra level of indirection
in the MES userq code.

Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2025-04-10 12:29:37 -04:00
parent 38feab2dea
commit 51a9ea4551
3 changed files with 23 additions and 41 deletions
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10
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
View File

@ -432,11 +432,11 @@ amdgpu_userqueue_resume_all(struct amdgpu_userq_mgr *uq_mgr)
/* Resume all the queues for this process */
idr_for_each_entry(&uq_mgr->userq_idr, queue, queue_id) {
userq_funcs = adev->userq_funcs[queue->queue_type];
ret = userq_funcs->resume(uq_mgr, queue);
ret = userq_funcs->map(uq_mgr, queue);
}
if (ret)
DRM_ERROR("Failed to resume all the queue\n");
DRM_ERROR("Failed to map all the queues\n");
return ret;
}
@ -587,14 +587,14 @@ amdgpu_userqueue_suspend_all(struct amdgpu_userq_mgr *uq_mgr)
int queue_id;
int ret = 0;
/* Try to suspend all the queues in this process ctx */
/* Try to unmap all the queues in this process ctx */
idr_for_each_entry(&uq_mgr->userq_idr, queue, queue_id) {
userq_funcs = adev->userq_funcs[queue->queue_type];
ret += userq_funcs->suspend(uq_mgr, queue);
ret += userq_funcs->unmap(uq_mgr, queue);
}
if (ret)
DRM_ERROR("Couldn't suspend all the queues\n");
DRM_ERROR("Couldn't unmap all the queues\n");
return ret;
}

8
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h
View File

@ -64,10 +64,10 @@ struct amdgpu_userq_funcs {
struct amdgpu_usermode_queue *queue);
void (*mqd_destroy)(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *uq);
int (*suspend)(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue);
int (*resume)(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue);
int (*unmap)(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue);
int (*map)(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue);
};
/* Usermode queues for gfx */

46
drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
View File

@ -98,14 +98,17 @@ mes_userq_create_wptr_mapping(struct amdgpu_userq_mgr *uq_mgr,
}
static int mes_userq_map(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue,
struct amdgpu_mqd_prop *userq_props)
struct amdgpu_usermode_queue *queue)
{
struct amdgpu_device *adev = uq_mgr->adev;
struct amdgpu_userq_obj *ctx = &queue->fw_obj;
struct amdgpu_mqd_prop *userq_props = queue->userq_prop;
struct mes_add_queue_input queue_input;
int r;
if (queue->queue_active)
return 0;
memset(&queue_input, 0x0, sizeof(struct mes_add_queue_input));
queue_input.process_va_start = 0;
@ -143,14 +146,17 @@ static int mes_userq_map(struct amdgpu_userq_mgr *uq_mgr,
return 0;
}
static void mes_userq_unmap(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue)
static int mes_userq_unmap(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue)
{
struct amdgpu_device *adev = uq_mgr->adev;
struct mes_remove_queue_input queue_input;
struct amdgpu_userq_obj *ctx = &queue->fw_obj;
int r;
if (!queue->queue_active)
return 0;
memset(&queue_input, 0x0, sizeof(struct mes_remove_queue_input));
queue_input.doorbell_offset = queue->doorbell_index;
queue_input.gang_context_addr = ctx->gpu_addr + AMDGPU_USERQ_PROC_CTX_SZ;
@ -161,6 +167,7 @@ static void mes_userq_unmap(struct amdgpu_userq_mgr *uq_mgr,
if (r)
DRM_ERROR("Failed to unmap queue in HW, err (%d)\n", r);
queue->queue_active = false;
return r;
}
static int mes_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
@ -314,7 +321,7 @@ static int mes_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
}
/* Map userqueue into FW using MES */
r = mes_userq_map(uq_mgr, queue, userq_props);
r = mes_userq_map(uq_mgr, queue);
if (r) {
DRM_ERROR("Failed to init MQD\n");
goto free_ctx;
@ -354,34 +361,9 @@ mes_userq_mqd_destroy(struct amdgpu_userq_mgr *uq_mgr,
pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
}
static int mes_userq_suspend(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue)
{
if (queue->queue_active)
mes_userq_unmap(uq_mgr, queue);
return 0;
}
static int mes_userq_resume(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue)
{
int ret;
if (queue->queue_active)
return 0;
ret = mes_userq_map(uq_mgr, queue, queue->userq_prop);
if (ret) {
DRM_ERROR("Failed to resume queue\n");
return ret;
}
return 0;
}
const struct amdgpu_userq_funcs userq_mes_funcs = {
.mqd_create = mes_userq_mqd_create,
.mqd_destroy = mes_userq_mqd_destroy,
.suspend = mes_userq_suspend,
.resume = mes_userq_resume,
.unmap = mes_userq_unmap,
.map = mes_userq_map,
};