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ASoC: codecs: lpass-tx-macro: Add SM6115 support
SM6115 has a TX macro, which surprisingly doesn't host a SWR master. Conditionally skip the SWR reset sequence on this platform. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230825-topic-6115tx-v1-2-ebed201ad54b@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -8,6 +8,8 @@
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/* NPL clock is expected */
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/* NPL clock is expected */
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#define LPASS_MACRO_FLAG_HAS_NPL_CLOCK BIT(0)
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#define LPASS_MACRO_FLAG_HAS_NPL_CLOCK BIT(0)
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/* The soundwire block should be internally reset at probe */
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#define LPASS_MACRO_FLAG_RESET_SWR BIT(1)
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struct lpass_macro {
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struct lpass_macro {
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struct device *macro_pd;
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struct device *macro_pd;
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@ -2045,13 +2045,17 @@ static int tx_macro_probe(struct platform_device *pdev)
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if (ret)
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if (ret)
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goto err_fsgen;
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goto err_fsgen;
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/* reset soundwire block */
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/* reset soundwire block */
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if (flags & LPASS_MACRO_FLAG_RESET_SWR)
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regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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CDC_TX_SWR_RESET_MASK, CDC_TX_SWR_RESET_ENABLE);
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CDC_TX_SWR_RESET_MASK, CDC_TX_SWR_RESET_ENABLE);
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regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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CDC_TX_SWR_CLK_EN_MASK,
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CDC_TX_SWR_CLK_EN_MASK,
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CDC_TX_SWR_CLK_ENABLE);
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CDC_TX_SWR_CLK_ENABLE);
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if (flags & LPASS_MACRO_FLAG_RESET_SWR)
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regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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CDC_TX_SWR_RESET_MASK, 0x0);
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CDC_TX_SWR_RESET_MASK, 0x0);
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@ -2158,18 +2162,22 @@ static const struct dev_pm_ops tx_macro_pm_ops = {
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static const struct of_device_id tx_macro_dt_match[] = {
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static const struct of_device_id tx_macro_dt_match[] = {
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{
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{
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.compatible = "qcom,sc7280-lpass-tx-macro",
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.compatible = "qcom,sc7280-lpass-tx-macro",
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.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
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}, {
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.compatible = "qcom,sm6115-lpass-tx-macro",
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.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
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.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
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}, {
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}, {
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.compatible = "qcom,sm8250-lpass-tx-macro",
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.compatible = "qcom,sm8250-lpass-tx-macro",
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.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
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.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
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}, {
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}, {
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.compatible = "qcom,sm8450-lpass-tx-macro",
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.compatible = "qcom,sm8450-lpass-tx-macro",
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.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
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.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
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}, {
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}, {
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.compatible = "qcom,sm8550-lpass-tx-macro",
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.compatible = "qcom,sm8550-lpass-tx-macro",
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.data = (void *)LPASS_MACRO_FLAG_RESET_SWR,
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}, {
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}, {
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.compatible = "qcom,sc8280xp-lpass-tx-macro",
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.compatible = "qcom,sc8280xp-lpass-tx-macro",
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.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
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.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
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},
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},
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{ }
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{ }
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};
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};
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