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PCI/P2PDMA: Document DMABUF model
Reflect latest changes in p2p implementation to support DMABUF lifecycle. Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Acked-by: Ankit Agrawal <ankita@nvidia.com> Link: https://lore.kernel.org/r/20251120-dmabuf-vfio-v9-5-d7f71607f371@nvidia.com Signed-off-by: Alex Williamson <alex@shazbot.org>
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@ -9,22 +9,48 @@ between two devices on the bus. This type of transaction is henceforth
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called Peer-to-Peer (or P2P). However, there are a number of issues that
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make P2P transactions tricky to do in a perfectly safe way.
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One of the biggest issues is that PCI doesn't require forwarding
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transactions between hierarchy domains, and in PCIe, each Root Port
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defines a separate hierarchy domain. To make things worse, there is no
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simple way to determine if a given Root Complex supports this or not.
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(See PCIe r4.0, sec 1.3.1). Therefore, as of this writing, the kernel
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only supports doing P2P when the endpoints involved are all behind the
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same PCI bridge, as such devices are all in the same PCI hierarchy
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domain, and the spec guarantees that all transactions within the
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hierarchy will be routable, but it does not require routing
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between hierarchies.
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For PCIe the routing of Transaction Layer Packets (TLPs) is well-defined up
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until they reach a host bridge or root port. If the path includes PCIe switches
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then based on the ACS settings the transaction can route entirely within
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the PCIe hierarchy and never reach the root port. The kernel will evaluate
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the PCIe topology and always permit P2P in these well-defined cases.
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The second issue is that to make use of existing interfaces in Linux,
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memory that is used for P2P transactions needs to be backed by struct
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pages. However, PCI BARs are not typically cache coherent so there are
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a few corner case gotchas with these pages so developers need to
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be careful about what they do with them.
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However, if the P2P transaction reaches the host bridge then it might have to
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hairpin back out the same root port, be routed inside the CPU SOC to another
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PCIe root port, or routed internally to the SOC.
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The PCIe specification doesn't define the forwarding of transactions between
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hierarchy domains and kernel defaults to blocking such routing. There is an
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allow list to allow detecting known-good HW, in which case P2P between any
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two PCIe devices will be permitted.
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Since P2P inherently is doing transactions between two devices it requires two
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drivers to be co-operating inside the kernel. The providing driver has to convey
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its MMIO to the consuming driver. To meet the driver model lifecycle rules the
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MMIO must have all DMA mapping removed, all CPU accesses prevented, all page
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table mappings undone before the providing driver completes remove().
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This requires the providing and consuming driver to actively work together to
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guarantee that the consuming driver has stopped using the MMIO during a removal
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cycle. This is done by either a synchronous invalidation shutdown or waiting
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for all usage refcounts to reach zero.
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At the lowest level the P2P subsystem offers a naked struct p2p_provider that
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delegates lifecycle management to the providing driver. It is expected that
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drivers using this option will wrap their MMIO memory in DMABUF and use DMABUF
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to provide an invalidation shutdown. These MMIO addresess have no struct page, and
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if used with mmap() must create special PTEs. As such there are very few
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kernel uAPIs that can accept pointers to them; in particular they cannot be used
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with read()/write(), including O_DIRECT.
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Building on this, the subsystem offers a layer to wrap the MMIO in a ZONE_DEVICE
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pgmap of MEMORY_DEVICE_PCI_P2PDMA to create struct pages. The lifecycle of
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pgmap ensures that when the pgmap is destroyed all other drivers have stopped
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using the MMIO. This option works with O_DIRECT flows, in some cases, if the
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underlying subsystem supports handling MEMORY_DEVICE_PCI_P2PDMA through
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FOLL_PCI_P2PDMA. The use of FOLL_LONGTERM is prevented. As this relies on pgmap
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it also relies on architecture support along with alignment and minimum size
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limitations.
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Driver Writer's Guide
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@ -114,14 +140,39 @@ allocating scatter-gather lists with P2P memory.
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Struct Page Caveats
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-------------------
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Driver writers should be very careful about not passing these special
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struct pages to code that isn't prepared for it. At this time, the kernel
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interfaces do not have any checks for ensuring this. This obviously
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precludes passing these pages to userspace.
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While the MEMORY_DEVICE_PCI_P2PDMA pages can be installed in VMAs,
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pin_user_pages() and related will not return them unless FOLL_PCI_P2PDMA is set.
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P2P memory is also technically IO memory but should never have any side
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effects behind it. Thus, the order of loads and stores should not be important
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and ioreadX(), iowriteX() and friends should not be necessary.
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The MEMORY_DEVICE_PCI_P2PDMA pages require care to support in the kernel. The
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KVA is still MMIO and must still be accessed through the normal
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readX()/writeX()/etc helpers. Direct CPU access (e.g. memcpy) is forbidden, just
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like any other MMIO mapping. While this will actually work on some
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architectures, others will experience corruption or just crash in the kernel.
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Supporting FOLL_PCI_P2PDMA in a subsystem requires scrubbing it to ensure no CPU
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access happens.
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Usage With DMABUF
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=================
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DMABUF provides an alternative to the above struct page-based
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client/provider/orchestrator system and should be used when struct page
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doesn't exist. In this mode the exporting driver will wrap
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some of its MMIO in a DMABUF and give the DMABUF FD to userspace.
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Userspace can then pass the FD to an importing driver which will ask the
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exporting driver to map it to the importer.
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In this case the initiator and target pci_devices are known and the P2P subsystem
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is used to determine the mapping type. The phys_addr_t-based DMA API is used to
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establish the dma_addr_t.
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Lifecycle is controlled by DMABUF move_notify(). When the exporting driver wants
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to remove() it must deliver an invalidation shutdown to all DMABUF importing
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drivers through move_notify() and synchronously DMA unmap all the MMIO.
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No importing driver can continue to have a DMA map to the MMIO after the
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exporting driver has destroyed its p2p_provider.
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P2P DMA Support Library
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