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cache: Make top level Kconfig menu a boolean dependent on RISCV 

The next patch will add a new type of cache maintenance driver responsible
for flushing deeper than is necessary for non coherent DMA (current
use case of drivers/cache drivers), as needed when performing operations
such as memory hotplug and security unlocking of persistent memory. The two
types of operation are similar enough to share a drivers/cache directory
and MAINTAINERS but are otherwise currently unrelated.

To avoid confusion have two separate menus. Each has dependencies that are
implemented by making them boolean symbols, here CACHEMAINT_FOR_DMA
which is dependent on RISCV as all driver are currently for platforms of
that architecture. Set new symbol default to y to avoid breaking existing
configs. This has no affect on actual code built, just visibility of the
menu.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Jonathan Cameron 2025-11-17 10:47:59 +00:00 committed by Conor Dooley
parent 9b9de5a56a
commit 4d1608d0ab
1 changed files with 11 additions and 4 deletions
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15
drivers/cache/Kconfig vendored
View File

@ -1,9 +1,17 @@
# SPDX-License-Identifier: GPL-2.0
menu "Cache Drivers"
menuconfig CACHEMAINT_FOR_DMA
bool "Cache management for noncoherent DMA"
depends on RISCV
default y
help
These drivers implement support for noncoherent DMA master devices
on platforms that lack the standard CPU interfaces for this.
if CACHEMAINT_FOR_DMA
config AX45MP_L2_CACHE
bool "Andes Technology AX45MP L2 Cache controller"
depends on RISCV
select RISCV_NONSTANDARD_CACHE_OPS
help
Support for the L2 cache controller on Andes Technology AX45MP platforms.
@ -16,7 +24,6 @@ config SIFIVE_CCACHE
config STARFIVE_STARLINK_CACHE
bool "StarFive StarLink Cache controller"
depends on RISCV
depends on ARCH_STARFIVE
depends on 64BIT
select RISCV_DMA_NONCOHERENT
@ -24,4 +31,4 @@ config STARFIVE_STARLINK_CACHE
help
Support for the StarLink cache controller IP from StarFive.
endmenu
endif #CACHEMAINT_FOR_DMA