mirror of https://github.com/torvalds/linux.git
drm urgent fixes for 6.18-rc5
nouveau: - revert DMA mask change -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmkPx08ACgkQDHTzWXnE hr67yxAAgVE3TvqcFqxNYhWcOFKzsYXQ//DkClHnpQy0mGQW9OgOkykMYlCWJnNQ xTq7MQLzby76EY39NckQSNtyeghle6SFNUt2tfe73T26VvN4naEyDM0m2IJaAVBs mPBQAl2DGhyIhbIzNLm7smxJV4IWvyh3u3Un9cafu9D/jDmZIdiWkqPCm+wL13pQ izt69BxCDbFzcKg+4XyuQsMKGzCz+KGh92krM3XyuM7imABtR/OhqVJctNmzWSOH BIDJX7aQz1QBR358UqHaqGMmoJslRfp3qNVa8AIuOdPfQwsp+l4Y8lhE6R6J0kWZ GnScEi0LZwrJiuLVyzb4OQ4BdF1ne4oYXAsoZipnHcjT2y7IuspAn1opSpNlgNQL l7AFYzEwQvq6b8krmCmBgQJrfkZXF7U4jngjD9Rd1uHl+tBQqlC3X32IXuZXddnY S7kglsFFbmbhoUxMgpzKnu07G1/7V+59SLgvUN5qlbAjulhXYcCrXC6FJe/YyKLs Da93B7mfGv3OqHQdLTVde63ODqnUZbvXUwOBRu3xEuwO7hN07YIrdYMkGfnkQlyT N3RiOKcn8Rkpj+CrQrkpw1iNvDpfGUKO5rL0OKC77yva5KDUxcQo6kpa1nDwW16Q QJ5ZYXWQyeWvyPRf2xmG7Ln6tkP485mfHOYFUq74/l5ZRQJpVx8= =gRi+ -----END PGP SIGNATURE----- Merge tag 'drm-fixes-2025-11-09' of https://gitlab.freedesktop.org/drm/kernel Pull drm fix from Dave Airlie: "Brown paper bag, the dma mask fix which I applied and actually looked through for bad things, actually broke newer GPUs, there might be some latent part in the boot path that is assuming 32-bit still, but we will figure that out elsewhere. nouveau: - revert DMA mask change" * tag 'drm-fixes-2025-11-09' of https://gitlab.freedesktop.org/drm/kernel: Revert "drm/nouveau: set DMA mask before creating the flush page"
This commit is contained in:
commit
439fc29dfd
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@ -1695,18 +1695,6 @@ nvkm_device_pci_new(struct pci_dev *pci_dev, const char *cfg, const char *dbg,
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*pdevice = &pdev->device;
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pdev->pdev = pci_dev;
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/* Set DMA mask based on capabilities reported by the MMU subdev. */
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if (pdev->device.mmu && !pdev->device.pci->agp.bridge)
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bits = pdev->device.mmu->dma_bits;
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else
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bits = 32;
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ret = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(bits));
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if (ret && bits != 32) {
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dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32));
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pdev->device.mmu->dma_bits = 32;
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}
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ret = nvkm_device_ctor(&nvkm_device_pci_func, quirk, &pci_dev->dev,
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pci_is_pcie(pci_dev) ? NVKM_DEVICE_PCIE :
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pci_find_capability(pci_dev, PCI_CAP_ID_AGP) ?
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@ -1720,5 +1708,17 @@ nvkm_device_pci_new(struct pci_dev *pci_dev, const char *cfg, const char *dbg,
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if (ret)
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return ret;
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/* Set DMA mask based on capabilities reported by the MMU subdev. */
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if (pdev->device.mmu && !pdev->device.pci->agp.bridge)
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bits = pdev->device.mmu->dma_bits;
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else
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bits = 32;
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ret = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(bits));
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if (ret && bits != 32) {
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dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32));
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pdev->device.mmu->dma_bits = 32;
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}
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return 0;
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}
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