mirror of https://github.com/torvalds/linux.git
clk: remove unneeded 'fast_io' parameter in regmap_config
When using MMIO with regmap, fast_io is implied. No need to set it again. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250813161517.4746-3-wsa+renesas@sang-engineering.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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8f5ae30d69
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4239b174c2
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@ -18,7 +18,6 @@ static const struct regmap_config owl_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x00cc,
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.max_register = 0x00cc,
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.fast_io = true,
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};
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};
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static void owl_clk_set_regmap(const struct owl_clk_desc *desc,
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static void owl_clk_set_regmap(const struct owl_clk_desc *desc,
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@ -529,7 +529,6 @@ static const struct regmap_config axmclk_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x1fffc,
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.max_register = 0x1fffc,
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.fast_io = true,
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};
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};
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static const struct of_device_id axmclk_match_table[] = {
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static const struct of_device_id axmclk_match_table[] = {
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@ -68,7 +68,6 @@ static const struct regmap_config lpc32xx_scb_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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.max_register = 0x114,
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.max_register = 0x114,
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.fast_io = true,
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};
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};
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static struct regmap *clk_regmap;
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static struct regmap *clk_regmap;
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@ -33,7 +33,6 @@ static const struct regmap_config a53pll_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x40,
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.max_register = 0x40,
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.fast_io = true,
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};
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};
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static struct pll_freq_tbl *qcom_a53pll_get_freq_tbl(struct device *dev)
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static struct pll_freq_tbl *qcom_a53pll_get_freq_tbl(struct device *dev)
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@ -50,7 +50,6 @@ static const struct regmap_config a7pll_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x1000,
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.max_register = 0x1000,
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.fast_io = true,
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};
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};
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static int qcom_a7pll_probe(struct platform_device *pdev)
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static int qcom_a7pll_probe(struct platform_device *pdev)
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@ -169,7 +169,6 @@ static const struct regmap_config ipq_pll_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x40,
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.max_register = 0x40,
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.fast_io = true,
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};
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};
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static int apss_ipq_pll_probe(struct platform_device *pdev)
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static int apss_ipq_pll_probe(struct platform_device *pdev)
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@ -212,7 +212,6 @@ static const struct regmap_config cbf_msm8996_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x10000,
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.max_register = 0x10000,
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.fast_io = true,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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};
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};
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@ -411,7 +411,6 @@ static const struct regmap_config cpu_msm8996_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x80210,
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.max_register = 0x80210,
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.fast_io = true,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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};
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};
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@ -99,7 +99,6 @@ static const struct regmap_config hfpll_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x30,
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.max_register = 0x30,
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.fast_io = true,
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};
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};
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static int qcom_hfpll_probe(struct platform_device *pdev)
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static int qcom_hfpll_probe(struct platform_device *pdev)
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@ -108,7 +108,6 @@ static const struct regmap_config ipq_cmn_pll_regmap_config = {
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x7fc,
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.max_register = 0x7fc,
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.fast_io = true,
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};
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};
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static const struct cmn_pll_fixed_output_clk ipq5018_output_clks[] = {
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static const struct cmn_pll_fixed_output_clk ipq5018_output_clks[] = {
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@ -1056,7 +1056,6 @@ static const struct regmap_config th1520_clk_regmap_config = {
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.reg_bits = 32,
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.reg_bits = 32,
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.val_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.reg_stride = 4,
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.fast_io = true,
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};
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};
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struct th1520_plat_data {
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struct th1520_plat_data {
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