mirror of https://github.com/torvalds/linux.git
drm/i915/color: Add framework to program PRE/POST CSC LUT
Add framework that will help in loading LUT to Pre/Post CSC color blocks. v2: Add dsb support v3: Align enum names v4: Propagate change in lut data to crtc_state Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Link: https://patch.msgid.link/20251203085211.3663374-11-uma.shankar@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -93,6 +93,10 @@ struct intel_color_funcs {
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/* Plane CSC*/
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void (*load_plane_csc_matrix)(struct intel_dsb *dsb,
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const struct intel_plane_state *plane_state);
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/* Plane Pre/Post CSC */
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void (*load_plane_luts)(struct intel_dsb *dsb,
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const struct intel_plane_state *plane_state);
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};
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#define CTM_COEFF_SIGN (1ULL << 63)
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@ -4077,11 +4081,23 @@ intel_color_load_plane_csc_matrix(struct intel_dsb *dsb,
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display->funcs.color->load_plane_csc_matrix(dsb, plane_state);
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}
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static void
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intel_color_load_plane_luts(struct intel_dsb *dsb,
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const struct intel_plane_state *plane_state)
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{
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struct intel_display *display = to_intel_display(plane_state);
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if (display->funcs.color->load_plane_luts)
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display->funcs.color->load_plane_luts(dsb, plane_state);
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}
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void intel_color_plane_program_pipeline(struct intel_dsb *dsb,
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const struct intel_plane_state *plane_state)
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{
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if (plane_state->hw.ctm)
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intel_color_load_plane_csc_matrix(dsb, plane_state);
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if (plane_state->hw.degamma_lut || plane_state->hw.gamma_lut)
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intel_color_load_plane_luts(dsb, plane_state);
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}
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void intel_color_crtc_init(struct intel_crtc *crtc)
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@ -646,7 +646,7 @@ struct intel_plane_state {
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enum drm_color_encoding color_encoding;
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enum drm_color_range color_range;
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enum drm_scaling_filter scaling_filter;
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struct drm_property_blob *ctm;
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struct drm_property_blob *ctm, *degamma_lut, *gamma_lut;
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} hw;
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struct i915_vma *ggtt_vma;
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@ -344,6 +344,10 @@ intel_plane_colorop_replace_blob(struct intel_plane_state *plane_state,
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{
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if (intel_colorop->id == INTEL_PLANE_CB_CSC)
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return drm_property_replace_blob(&plane_state->hw.ctm, blob);
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else if (intel_colorop->id == INTEL_PLANE_CB_PRE_CSC_LUT)
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return drm_property_replace_blob(&plane_state->hw.degamma_lut, blob);
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else if (intel_colorop->id == INTEL_PLANE_CB_POST_CSC_LUT)
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return drm_property_replace_blob(&plane_state->hw.gamma_lut, blob);
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return false;
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}
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