mirror of https://github.com/torvalds/linux.git
drm/amd/display: Clear DPP 3DLUT Cap
[WHY & HOW] Clear DPP 3DLUT Cap flag on ASICs that do not use it Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Ryan Seto <ryanseto@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -245,6 +245,7 @@ struct mpc_color_caps {
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struct rom_curve_caps ogam_rom_caps;
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struct lut3d_caps mcm_3d_lut_caps;
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struct lut3d_caps rmcm_3d_lut_caps;
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bool preblend;
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};
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/**
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@ -2251,7 +2251,7 @@ static bool dcn32_resource_construct(
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dc->caps.color.dpp.gamma_corr = 1;
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dc->caps.color.dpp.dgam_rom_for_yuv = 0;
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dc->caps.color.dpp.hw_3d_lut = 1;
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dc->caps.color.dpp.hw_3d_lut = 0;
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dc->caps.color.dpp.ogam_ram = 0; // no OGAM in DPP since DCN1
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// no OGAM ROM on DCN2 and later ASICs
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dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
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@ -2270,6 +2270,7 @@ static bool dcn32_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.pq = 0;
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.color.mpc.preblend = true;
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/* Use pipe context based otg sync logic */
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dc->config.use_pipe_ctx_sync_logic = true;
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@ -1755,8 +1755,8 @@ static bool dcn321_resource_construct(
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dc->caps.color.dpp.gamma_corr = 1;
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dc->caps.color.dpp.dgam_rom_for_yuv = 0;
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dc->caps.color.dpp.hw_3d_lut = 1;
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dc->caps.color.dpp.ogam_ram = 1;
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dc->caps.color.dpp.hw_3d_lut = 0;
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dc->caps.color.dpp.ogam_ram = 0;
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// no OGAM ROM on DCN2 and later ASICs
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dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
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dc->caps.color.dpp.ogam_rom_caps.bt2020 = 0;
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@ -1774,6 +1774,7 @@ static bool dcn321_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.pq = 0;
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.color.mpc.preblend = true;
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/* Use pipe context based otg sync logic */
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dc->config.use_pipe_ctx_sync_logic = true;
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@ -1874,7 +1874,7 @@ static bool dcn35_resource_construct(
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dc->caps.color.dpp.gamma_corr = 1;
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dc->caps.color.dpp.dgam_rom_for_yuv = 0;
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dc->caps.color.dpp.hw_3d_lut = 1;
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dc->caps.color.dpp.hw_3d_lut = 0;
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dc->caps.color.dpp.ogam_ram = 0; // no OGAM in DPP since DCN1
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// no OGAM ROM on DCN301
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dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
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@ -1893,6 +1893,7 @@ static bool dcn35_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.pq = 0;
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.color.mpc.preblend = true;
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dc->caps.num_of_host_routers = 2;
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dc->caps.num_of_dpias_per_host_router = 2;
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@ -1846,7 +1846,7 @@ static bool dcn351_resource_construct(
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dc->caps.color.dpp.gamma_corr = 1;
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dc->caps.color.dpp.dgam_rom_for_yuv = 0;
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dc->caps.color.dpp.hw_3d_lut = 1;
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dc->caps.color.dpp.hw_3d_lut = 0;
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dc->caps.color.dpp.ogam_ram = 0; // no OGAM in DPP since DCN1
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// no OGAM ROM on DCN301
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dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
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@ -1865,6 +1865,7 @@ static bool dcn351_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.pq = 0;
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.color.mpc.preblend = true;
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dc->caps.num_of_host_routers = 2;
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dc->caps.num_of_dpias_per_host_router = 2;
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@ -1847,7 +1847,7 @@ static bool dcn36_resource_construct(
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dc->caps.color.dpp.gamma_corr = 1;
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dc->caps.color.dpp.dgam_rom_for_yuv = 0;
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dc->caps.color.dpp.hw_3d_lut = 1;
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dc->caps.color.dpp.hw_3d_lut = 0;
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dc->caps.color.dpp.ogam_ram = 0; // no OGAM in DPP since DCN1
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// no OGAM ROM on DCN301
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dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
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@ -1866,6 +1866,7 @@ static bool dcn36_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.pq = 0;
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.color.mpc.preblend = true;
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dc->caps.num_of_host_routers = 2;
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dc->caps.num_of_dpias_per_host_router = 2;
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@ -1948,6 +1948,7 @@ static bool dcn401_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.pq = 0;
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.color.mpc.preblend = true;
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dc->config.use_spl = true;
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dc->config.prefer_easf = true;
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