mirror of https://github.com/torvalds/linux.git
bpf: Add arm64 JIT support for PROBE_MEM32 pseudo instructions.
Add support for [LDX | STX | ST], PROBE_MEM32, [B | H | W | DW] instructions. They are similar to PROBE_MEM instructions with the following differences: - PROBE_MEM32 supports store. - PROBE_MEM32 relies on the verifier to clear upper 32-bit of the src/dst register - PROBE_MEM32 adds 64-bit kern_vm_start address (which is stored in R28 in the prologue). Due to bpf_arena constructions such R28 + reg + off16 access is guaranteed to be within arena virtual range, so no address check at run-time. - PROBE_MEM32 allows STX and ST. If they fault the store is a nop. When LDX faults the destination register is zeroed. To support these on arm64, we do tmp2 = R28 + src/dst reg and then use tmp2 as the new src/dst register. This allows us to reuse most of the code for normal [LDX | STX | ST]. Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> Link: https://lore.kernel.org/r/20240325150716.4387-2-puranjay12@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
This commit is contained in:
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c07b4bcd51
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339af577ec
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@ -29,6 +29,7 @@
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#define TCALL_CNT (MAX_BPF_JIT_REG + 2)
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#define TCALL_CNT (MAX_BPF_JIT_REG + 2)
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#define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
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#define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
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#define FP_BOTTOM (MAX_BPF_JIT_REG + 4)
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#define FP_BOTTOM (MAX_BPF_JIT_REG + 4)
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#define ARENA_VM_START (MAX_BPF_JIT_REG + 5)
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#define check_imm(bits, imm) do { \
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#define check_imm(bits, imm) do { \
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if ((((imm) > 0) && ((imm) >> (bits))) || \
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if ((((imm) > 0) && ((imm) >> (bits))) || \
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@ -67,6 +68,8 @@ static const int bpf2a64[] = {
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/* temporary register for blinding constants */
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/* temporary register for blinding constants */
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[BPF_REG_AX] = A64_R(9),
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[BPF_REG_AX] = A64_R(9),
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[FP_BOTTOM] = A64_R(27),
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[FP_BOTTOM] = A64_R(27),
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/* callee saved register for kern_vm_start address */
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[ARENA_VM_START] = A64_R(28),
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};
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};
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struct jit_ctx {
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struct jit_ctx {
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@ -295,7 +298,7 @@ static bool is_lsi_offset(int offset, int scale)
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#define PROLOGUE_OFFSET (BTI_INSNS + 2 + PAC_INSNS + 8)
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#define PROLOGUE_OFFSET (BTI_INSNS + 2 + PAC_INSNS + 8)
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static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
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static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
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bool is_exception_cb)
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bool is_exception_cb, u64 arena_vm_start)
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{
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{
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const struct bpf_prog *prog = ctx->prog;
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const struct bpf_prog *prog = ctx->prog;
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const bool is_main_prog = !bpf_is_subprog(prog);
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const bool is_main_prog = !bpf_is_subprog(prog);
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@ -306,6 +309,7 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
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const u8 fp = bpf2a64[BPF_REG_FP];
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const u8 fp = bpf2a64[BPF_REG_FP];
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const u8 tcc = bpf2a64[TCALL_CNT];
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const u8 tcc = bpf2a64[TCALL_CNT];
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const u8 fpb = bpf2a64[FP_BOTTOM];
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const u8 fpb = bpf2a64[FP_BOTTOM];
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const u8 arena_vm_base = bpf2a64[ARENA_VM_START];
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const int idx0 = ctx->idx;
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const int idx0 = ctx->idx;
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int cur_offset;
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int cur_offset;
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@ -411,6 +415,10 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
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/* Set up function call stack */
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/* Set up function call stack */
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emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
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emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
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if (arena_vm_start)
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emit_a64_mov_i64(arena_vm_base, arena_vm_start, ctx);
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return 0;
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return 0;
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}
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}
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@ -738,6 +746,7 @@ static void build_epilogue(struct jit_ctx *ctx, bool is_exception_cb)
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#define BPF_FIXUP_OFFSET_MASK GENMASK(26, 0)
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#define BPF_FIXUP_OFFSET_MASK GENMASK(26, 0)
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#define BPF_FIXUP_REG_MASK GENMASK(31, 27)
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#define BPF_FIXUP_REG_MASK GENMASK(31, 27)
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#define DONT_CLEAR 5 /* Unused ARM64 register from BPF's POV */
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bool ex_handler_bpf(const struct exception_table_entry *ex,
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bool ex_handler_bpf(const struct exception_table_entry *ex,
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struct pt_regs *regs)
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struct pt_regs *regs)
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@ -745,7 +754,8 @@ bool ex_handler_bpf(const struct exception_table_entry *ex,
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off_t offset = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex->fixup);
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off_t offset = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex->fixup);
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int dst_reg = FIELD_GET(BPF_FIXUP_REG_MASK, ex->fixup);
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int dst_reg = FIELD_GET(BPF_FIXUP_REG_MASK, ex->fixup);
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regs->regs[dst_reg] = 0;
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if (dst_reg != DONT_CLEAR)
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regs->regs[dst_reg] = 0;
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regs->pc = (unsigned long)&ex->fixup - offset;
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regs->pc = (unsigned long)&ex->fixup - offset;
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return true;
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return true;
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}
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}
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@ -765,7 +775,8 @@ static int add_exception_handler(const struct bpf_insn *insn,
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return 0;
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return 0;
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if (BPF_MODE(insn->code) != BPF_PROBE_MEM &&
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if (BPF_MODE(insn->code) != BPF_PROBE_MEM &&
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BPF_MODE(insn->code) != BPF_PROBE_MEMSX)
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BPF_MODE(insn->code) != BPF_PROBE_MEMSX &&
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BPF_MODE(insn->code) != BPF_PROBE_MEM32)
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return 0;
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return 0;
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if (!ctx->prog->aux->extable ||
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if (!ctx->prog->aux->extable ||
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@ -810,6 +821,9 @@ static int add_exception_handler(const struct bpf_insn *insn,
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ex->insn = ins_offset;
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ex->insn = ins_offset;
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if (BPF_CLASS(insn->code) != BPF_LDX)
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dst_reg = DONT_CLEAR;
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ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) |
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ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) |
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FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);
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FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);
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@ -829,12 +843,13 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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bool extra_pass)
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bool extra_pass)
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{
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{
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const u8 code = insn->code;
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const u8 code = insn->code;
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const u8 dst = bpf2a64[insn->dst_reg];
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u8 dst = bpf2a64[insn->dst_reg];
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const u8 src = bpf2a64[insn->src_reg];
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u8 src = bpf2a64[insn->src_reg];
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const u8 tmp = bpf2a64[TMP_REG_1];
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const u8 tmp = bpf2a64[TMP_REG_1];
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const u8 tmp2 = bpf2a64[TMP_REG_2];
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const u8 tmp2 = bpf2a64[TMP_REG_2];
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const u8 fp = bpf2a64[BPF_REG_FP];
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const u8 fp = bpf2a64[BPF_REG_FP];
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const u8 fpb = bpf2a64[FP_BOTTOM];
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const u8 fpb = bpf2a64[FP_BOTTOM];
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const u8 arena_vm_base = bpf2a64[ARENA_VM_START];
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const s16 off = insn->off;
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const s16 off = insn->off;
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const s32 imm = insn->imm;
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const s32 imm = insn->imm;
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const int i = insn - ctx->prog->insnsi;
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const int i = insn - ctx->prog->insnsi;
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@ -1237,7 +1252,15 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:
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case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:
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case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:
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case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:
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case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:
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case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:
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if (ctx->fpb_offset > 0 && src == fp) {
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case BPF_LDX | BPF_PROBE_MEM32 | BPF_B:
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case BPF_LDX | BPF_PROBE_MEM32 | BPF_H:
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case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:
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case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:
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if (BPF_MODE(insn->code) == BPF_PROBE_MEM32) {
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emit(A64_ADD(1, tmp2, src, arena_vm_base), ctx);
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src = tmp2;
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}
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if (ctx->fpb_offset > 0 && src == fp && BPF_MODE(insn->code) != BPF_PROBE_MEM32) {
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src_adj = fpb;
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src_adj = fpb;
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off_adj = off + ctx->fpb_offset;
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off_adj = off + ctx->fpb_offset;
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} else {
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} else {
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@ -1322,7 +1345,15 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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case BPF_ST | BPF_MEM | BPF_H:
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case BPF_ST | BPF_MEM | BPF_H:
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case BPF_ST | BPF_MEM | BPF_B:
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case BPF_ST | BPF_MEM | BPF_B:
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case BPF_ST | BPF_MEM | BPF_DW:
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case BPF_ST | BPF_MEM | BPF_DW:
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if (ctx->fpb_offset > 0 && dst == fp) {
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case BPF_ST | BPF_PROBE_MEM32 | BPF_B:
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case BPF_ST | BPF_PROBE_MEM32 | BPF_H:
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case BPF_ST | BPF_PROBE_MEM32 | BPF_W:
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case BPF_ST | BPF_PROBE_MEM32 | BPF_DW:
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if (BPF_MODE(insn->code) == BPF_PROBE_MEM32) {
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emit(A64_ADD(1, tmp2, dst, arena_vm_base), ctx);
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dst = tmp2;
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}
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if (ctx->fpb_offset > 0 && dst == fp && BPF_MODE(insn->code) != BPF_PROBE_MEM32) {
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dst_adj = fpb;
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dst_adj = fpb;
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off_adj = off + ctx->fpb_offset;
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off_adj = off + ctx->fpb_offset;
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} else {
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} else {
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@ -1365,6 +1396,10 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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}
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}
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break;
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break;
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}
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}
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ret = add_exception_handler(insn, ctx, dst);
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if (ret)
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return ret;
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break;
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break;
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/* STX: *(size *)(dst + off) = src */
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/* STX: *(size *)(dst + off) = src */
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@ -1372,7 +1407,15 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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case BPF_STX | BPF_MEM | BPF_H:
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case BPF_STX | BPF_MEM | BPF_H:
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case BPF_STX | BPF_MEM | BPF_B:
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case BPF_STX | BPF_MEM | BPF_B:
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case BPF_STX | BPF_MEM | BPF_DW:
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case BPF_STX | BPF_MEM | BPF_DW:
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if (ctx->fpb_offset > 0 && dst == fp) {
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case BPF_STX | BPF_PROBE_MEM32 | BPF_B:
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case BPF_STX | BPF_PROBE_MEM32 | BPF_H:
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case BPF_STX | BPF_PROBE_MEM32 | BPF_W:
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case BPF_STX | BPF_PROBE_MEM32 | BPF_DW:
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if (BPF_MODE(insn->code) == BPF_PROBE_MEM32) {
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emit(A64_ADD(1, tmp2, dst, arena_vm_base), ctx);
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dst = tmp2;
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}
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if (ctx->fpb_offset > 0 && dst == fp && BPF_MODE(insn->code) != BPF_PROBE_MEM32) {
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dst_adj = fpb;
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dst_adj = fpb;
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off_adj = off + ctx->fpb_offset;
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off_adj = off + ctx->fpb_offset;
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} else {
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} else {
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@ -1413,6 +1456,10 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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}
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}
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break;
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break;
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}
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}
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ret = add_exception_handler(insn, ctx, dst);
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if (ret)
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return ret;
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break;
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break;
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case BPF_STX | BPF_ATOMIC | BPF_W:
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case BPF_STX | BPF_ATOMIC | BPF_W:
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@ -1594,6 +1641,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
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bool tmp_blinded = false;
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bool tmp_blinded = false;
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bool extra_pass = false;
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bool extra_pass = false;
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struct jit_ctx ctx;
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struct jit_ctx ctx;
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u64 arena_vm_start;
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u8 *image_ptr;
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u8 *image_ptr;
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u8 *ro_image_ptr;
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u8 *ro_image_ptr;
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@ -1611,6 +1659,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
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prog = tmp;
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prog = tmp;
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}
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}
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arena_vm_start = bpf_arena_get_kern_vm_start(prog->aux->arena);
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jit_data = prog->aux->jit_data;
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jit_data = prog->aux->jit_data;
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if (!jit_data) {
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if (!jit_data) {
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jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
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jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
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@ -1648,7 +1697,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
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* BPF line info needs ctx->offset[i] to be the offset of
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* BPF line info needs ctx->offset[i] to be the offset of
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* instruction[i] in jited image, so build prologue first.
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* instruction[i] in jited image, so build prologue first.
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*/
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*/
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if (build_prologue(&ctx, was_classic, prog->aux->exception_cb)) {
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if (build_prologue(&ctx, was_classic, prog->aux->exception_cb,
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arena_vm_start)) {
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prog = orig_prog;
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prog = orig_prog;
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goto out_off;
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goto out_off;
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}
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}
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@ -1696,7 +1746,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
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ctx.idx = 0;
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ctx.idx = 0;
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ctx.exentry_idx = 0;
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ctx.exentry_idx = 0;
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build_prologue(&ctx, was_classic, prog->aux->exception_cb);
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build_prologue(&ctx, was_classic, prog->aux->exception_cb, arena_vm_start);
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if (build_body(&ctx, extra_pass)) {
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if (build_body(&ctx, extra_pass)) {
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prog = orig_prog;
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prog = orig_prog;
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