mirror of https://github.com/torvalds/linux.git
dt-bindings: pinctrl: qcom,apq8064-pinctrl: convert to dtschema
Convert the Qualcomm APQ8064 TLMM block bindings from text to yaml dt schema format. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/20240709162009.5166-2-rayyan.ansari@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Rayyan Ansari
Linus Walleij
parent
3479c7ae9c
commit
31ed8634a2
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Qualcomm APQ8064 TLMM block
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Required properties:
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- compatible: "qcom,apq8064-pinctrl"
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- reg: Should be the base address and length of the TLMM block.
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- interrupts: Should be the parent IRQ of the TLMM block.
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells: Should be two.
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- gpio-controller: Marks the device node as a GPIO controller.
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- #gpio-cells : Should be two.
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The first cell is the gpio pin number and the
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second cell is used for optional parameters.
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- gpio-ranges: see ../gpio/gpio.txt
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Optional properties:
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- gpio-reserved-ranges: see ../gpio/gpio.txt
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Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
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a general description of GPIO and interrupt bindings.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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Qualcomm's pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, drive strength, etc.
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function.
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pin configuration subnode:
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pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-strength,
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output-low, output-high.
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Non-empty subnodes must specify the 'pins' property.
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Valid values for pins are:
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gpio0-gpio89
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Valid values for function are:
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cam_mclk, codec_mic_i2s, codec_spkr_i2s, gp_clk_0a, gp_clk_0b, gp_clk_1a,
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gp_clk_1b, gp_clk_2a, gp_clk_2b, gpio, gsbi1, gsbi2, gsbi3, gsbi4,
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gsbi4_cam_i2c, gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6,
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gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3, gsbi7, gsbi7_spi_cs1,
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gsbi7_spi_cs2, gsbi7_spi_cs3, gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm,
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riva_wlan, sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic, ps_hold
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Example:
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msmgpio: pinctrl@800000 {
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compatible = "qcom,apq8064-pinctrl";
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reg = <0x800000 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <0 16 0x4>;
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pinctrl-names = "default";
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pinctrl-0 = <&gsbi5_uart_default>;
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gpio-ranges = <&msmgpio 0 0 90>;
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gsbi5_uart_default: gsbi5_uart_default {
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mux {
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pins = "gpio51", "gpio52";
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function = "gsbi5";
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};
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tx {
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pins = "gpio51";
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drive-strength = <4>;
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bias-disable;
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};
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rx {
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pins = "gpio52";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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@ -0,0 +1,110 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,apq8064-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. APQ8064 TLMM block
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description: |
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Top Level Mode Multiplexer pin controller in Qualcomm APQ8064 SoC.
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allOf:
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- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
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properties:
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compatible:
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const: qcom,apq8064-pinctrl
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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gpio-reserved-ranges: true
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-apq8064-tlmm-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-apq8064-tlmm-state"
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additionalProperties: false
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$defs:
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qcom-apq8064-tlmm-state:
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
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unevaluatedProperties: false
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this
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subnode.
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items:
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oneOf:
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- pattern: "^gpio([0-9]|[1-8][0-9])$"
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- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc3_clk, sdc3_cmd, sdc3_data ]
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minItems: 1
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maxItems: 36
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function:
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description:
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Specify the alternative function to be configured for the specified
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pins.
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enum: [ cam_mclk, codec_mic_i2s, codec_spkr_i2s, gp_clk_0a,
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gp_clk_0b, gp_clk_1a, gp_clk_1b, gp_clk_2a, gp_clk_2b,
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gpio, gsbi1, gsbi2, gsbi3, gsbi4, gsbi4_cam_i2c,
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gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3,
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gsbi6, gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3,
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gsbi7, gsbi7_spi_cs1, gsbi7_spi_cs2, gsbi7_spi_cs3,
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gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm, riva_wlan,
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sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic,
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ps_hold ]
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required:
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- pins
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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tlmm: pinctrl@800000 {
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compatible = "qcom,apq8064-pinctrl";
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reg = <0x800000 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&tlmm 0 0 90>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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uart-state {
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rx-pins {
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pins = "gpio52";
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function = "gsbi5";
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bias-pull-up;
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};
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tx-pins {
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pins = "gpio51";
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function = "gsbi5";
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bias-disable;
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};
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};
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};
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