mirror of https://github.com/torvalds/linux.git
dt-bindings: pinctrl: qcom,apq8064-pinctrl: convert to dtschema
Convert the Qualcomm APQ8064 TLMM block bindings from text to yaml dt schema format. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/20240709162009.5166-2-rayyan.ansari@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Rayyan Ansari
Linus Walleij
parent
3479c7ae9c
commit
31ed8634a2
|
|
@ -1,95 +0,0 @@
|
|||
Qualcomm APQ8064 TLMM block
|
||||
|
||||
Required properties:
|
||||
- compatible: "qcom,apq8064-pinctrl"
|
||||
- reg: Should be the base address and length of the TLMM block.
|
||||
- interrupts: Should be the parent IRQ of the TLMM block.
|
||||
- interrupt-controller: Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells: Should be two.
|
||||
- gpio-controller: Marks the device node as a GPIO controller.
|
||||
- #gpio-cells : Should be two.
|
||||
The first cell is the gpio pin number and the
|
||||
second cell is used for optional parameters.
|
||||
- gpio-ranges: see ../gpio/gpio.txt
|
||||
|
||||
Optional properties:
|
||||
|
||||
- gpio-reserved-ranges: see ../gpio/gpio.txt
|
||||
|
||||
Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
|
||||
a general description of GPIO and interrupt bindings.
|
||||
|
||||
Please refer to pinctrl-bindings.txt in this directory for details of the
|
||||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Qualcomm's pin configuration nodes act as a container for an arbitrary number of
|
||||
subnodes. Each of these subnodes represents some desired configuration for a
|
||||
pin, a group, or a list of pins or groups. This configuration can include the
|
||||
mux function to select on those pin(s)/group(s), and various pin configuration
|
||||
parameters, such as pull-up, drive strength, etc.
|
||||
|
||||
The name of each subnode is not important; all subnodes should be enumerated
|
||||
and processed purely based on their content.
|
||||
|
||||
Each subnode only affects those parameters that are explicitly listed. In
|
||||
other words, a subnode that lists a mux function but no pin configuration
|
||||
parameters implies no information about any pin configuration parameters.
|
||||
Similarly, a pin subnode that describes a pullup parameter implies no
|
||||
information about e.g. the mux function.
|
||||
|
||||
|
||||
The following generic properties as defined in pinctrl-bindings.txt are valid
|
||||
to specify in a pin configuration subnode:
|
||||
|
||||
pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-strength,
|
||||
output-low, output-high.
|
||||
|
||||
Non-empty subnodes must specify the 'pins' property.
|
||||
|
||||
Valid values for pins are:
|
||||
gpio0-gpio89
|
||||
|
||||
Valid values for function are:
|
||||
cam_mclk, codec_mic_i2s, codec_spkr_i2s, gp_clk_0a, gp_clk_0b, gp_clk_1a,
|
||||
gp_clk_1b, gp_clk_2a, gp_clk_2b, gpio, gsbi1, gsbi2, gsbi3, gsbi4,
|
||||
gsbi4_cam_i2c, gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6,
|
||||
gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3, gsbi7, gsbi7_spi_cs1,
|
||||
gsbi7_spi_cs2, gsbi7_spi_cs3, gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm,
|
||||
riva_wlan, sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic, ps_hold
|
||||
|
||||
Example:
|
||||
|
||||
msmgpio: pinctrl@800000 {
|
||||
compatible = "qcom,apq8064-pinctrl";
|
||||
reg = <0x800000 0x4000>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <0 16 0x4>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gsbi5_uart_default>;
|
||||
gpio-ranges = <&msmgpio 0 0 90>;
|
||||
|
||||
gsbi5_uart_default: gsbi5_uart_default {
|
||||
mux {
|
||||
pins = "gpio51", "gpio52";
|
||||
function = "gsbi5";
|
||||
};
|
||||
|
||||
tx {
|
||||
pins = "gpio51";
|
||||
drive-strength = <4>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
rx {
|
||||
pins = "gpio52";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,110 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/qcom,apq8064-pinctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies, Inc. APQ8064 TLMM block
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
|
||||
description: |
|
||||
Top Level Mode Multiplexer pin controller in Qualcomm APQ8064 SoC.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,apq8064-pinctrl
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
gpio-reserved-ranges: true
|
||||
|
||||
patternProperties:
|
||||
"-state$":
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-apq8064-tlmm-state"
|
||||
- patternProperties:
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-apq8064-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
$defs:
|
||||
qcom-apq8064-tlmm-state:
|
||||
type: object
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
pins:
|
||||
description:
|
||||
List of gpio pins affected by the properties specified in this
|
||||
subnode.
|
||||
items:
|
||||
oneOf:
|
||||
- pattern: "^gpio([0-9]|[1-8][0-9])$"
|
||||
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc3_clk, sdc3_cmd, sdc3_data ]
|
||||
minItems: 1
|
||||
maxItems: 36
|
||||
|
||||
function:
|
||||
description:
|
||||
Specify the alternative function to be configured for the specified
|
||||
pins.
|
||||
enum: [ cam_mclk, codec_mic_i2s, codec_spkr_i2s, gp_clk_0a,
|
||||
gp_clk_0b, gp_clk_1a, gp_clk_1b, gp_clk_2a, gp_clk_2b,
|
||||
gpio, gsbi1, gsbi2, gsbi3, gsbi4, gsbi4_cam_i2c,
|
||||
gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3,
|
||||
gsbi6, gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3,
|
||||
gsbi7, gsbi7_spi_cs1, gsbi7_spi_cs2, gsbi7_spi_cs3,
|
||||
gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm, riva_wlan,
|
||||
sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic,
|
||||
ps_hold ]
|
||||
|
||||
required:
|
||||
- pins
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
tlmm: pinctrl@800000 {
|
||||
compatible = "qcom,apq8064-pinctrl";
|
||||
reg = <0x800000 0x4000>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 90>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
uart-state {
|
||||
rx-pins {
|
||||
pins = "gpio52";
|
||||
function = "gsbi5";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx-pins {
|
||||
pins = "gpio51";
|
||||
function = "gsbi5";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue