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pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL 

This generic pin config property is confusingly named so let's
rename it to make things clearer.

There are already drivers in the tree that use PIN_CONFIG_OUTPUT
to *read* the value of an output driven pin, which is a big
semantic confusion for the head: are we then reading the
setting of the output or the actual value/level that is put
out on the pin?

We already have PIN_CONFIG_OUTPUT_ENABLE that turns on driver
buffers for output, so this can by logical conclusion only
drive the voltage level if it should be any different.

But if we read the pin, are we then reading the *setting* of
the output value or the *actual* value we can see on the
line?

If the pin has not first been set into output mode with
PIN_CONFIG_OUTPUT_ENABLE, but is instead in some input mode
or tristate, what will reading this property actually
return?

Reading the current users reading this property it is clear
that what we read is the logical level of the pin as 0 or 1
depending on if it is low or high.

Rename it to PIN_CONFIG_LEVEL so it is crystal clear that
we set or read the voltage level of the pin and nothing else.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij 2025-09-05 11:21:50 +02:00
parent 6c3442b3b6
commit 203a83112e
39 changed files with 91 additions and 87 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/driver-api/pin-control.rst
View File

@ -863,7 +863,7 @@ has to be handled by the ``<linux/gpio/consumer.h>`` interface. Instead view thi
a certain pin config setting. Look in e.g. ``<linux/pinctrl/pinconf-generic.h>``
and you find this in the documentation:
PIN_CONFIG_OUTPUT:
PIN_CONFIG_LEVEL:
this will configure the pin in output, use argument
1 to indicate high level, argument 0 to indicate low level.
@ -897,7 +897,7 @@ And your machine configuration may look like this:
};
static unsigned long uart_sleep_mode[] = {
PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0),
PIN_CONF_PACKED(PIN_CONFIG_LEVEL, 0),
};
static struct pinctrl_map pinmap[] __initdata = {

2
drivers/gpio/gpio-rockchip.c
View File

@ -769,7 +769,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
list_del(&cfg->head);
switch (cfg->param) {
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->arg);
if (ret)
dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin,

6
drivers/pinctrl/bcm/pinctrl-bcm2835.c
View File

@ -1023,7 +1023,7 @@ static int bcm2835_pinconf_get(struct pinctrl_dev *pctldev,
/* No way to read back bias config in HW */
switch (param) {
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if (fsel != BCM2835_FSEL_GPIO_OUT)
return -EINVAL;
@ -1091,7 +1091,7 @@ static int bcm2835_pinconf_set(struct pinctrl_dev *pctldev,
break;
/* Set output-high or output-low */
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
bcm2835_gpio_set_bit(pc, arg ? GPSET0 : GPCLR0, pin);
break;
@ -1202,7 +1202,7 @@ static int bcm2711_pinconf_set(struct pinctrl_dev *pctldev,
break;
/* Set output-high or output-low */
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
bcm2835_gpio_set_bit(pc, arg ? GPSET0 : GPCLR0, pin);
break;

4
drivers/pinctrl/cirrus/pinctrl-madera-core.c
View File

@ -804,7 +804,7 @@ static int madera_pin_conf_get(struct pinctrl_dev *pctldev, unsigned int pin,
if (conf[0] & MADERA_GP1_IP_CFG_MASK)
result = 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if ((conf[1] & MADERA_GP1_DIR_MASK) &&
(conf[0] & MADERA_GP1_LVL_MASK))
result = 1;
@ -902,7 +902,7 @@ static int madera_pin_conf_set(struct pinctrl_dev *pctldev, unsigned int pin,
mask[1] |= MADERA_GP1_DIR_MASK;
conf[1] |= MADERA_GP1_DIR;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
val = pinconf_to_config_argument(*configs);
mask[0] |= MADERA_GP1_LVL_MASK;
if (val)

4
drivers/pinctrl/mediatek/pinctrl-airoha.c
View File

@ -2765,7 +2765,7 @@ static int airoha_pinconf_set(struct pinctrl_dev *pctrl_dev,
break;
case PIN_CONFIG_OUTPUT_ENABLE:
case PIN_CONFIG_INPUT_ENABLE:
case PIN_CONFIG_OUTPUT: {
case PIN_CONFIG_LEVEL: {
bool input = param == PIN_CONFIG_INPUT_ENABLE;
int err;
@ -2774,7 +2774,7 @@ static int airoha_pinconf_set(struct pinctrl_dev *pctrl_dev,
if (err)
return err;
if (param == PIN_CONFIG_OUTPUT) {
if (param == PIN_CONFIG_LEVEL) {
err = airoha_pinconf_set_pin_value(pctrl_dev,
pin, !!arg);
if (err)

2
drivers/pinctrl/mediatek/pinctrl-moore.c
View File

@ -332,7 +332,7 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
goto err;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
MTK_OUTPUT);
if (err)

2
drivers/pinctrl/mediatek/pinctrl-mtk-common.c
View File

@ -384,7 +384,7 @@ static int mtk_pconf_parse_conf(struct pinctrl_dev *pctldev,
mtk_pmx_gpio_set_direction(pctldev, NULL, pin, true);
ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
mtk_gpio_set(pctl->chip, pin, arg);
ret = mtk_pmx_gpio_set_direction(pctldev, NULL, pin, false);
break;

4
drivers/pinctrl/mediatek/pinctrl-paris.c
View File

@ -169,7 +169,7 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
if (!ret)
err = -EINVAL;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
if (err)
break;
@ -292,7 +292,7 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
/* regard all non-zero value as enable */
err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
arg);
if (err)

6
drivers/pinctrl/meson/pinctrl-amlogic-a4.c
View File

@ -422,7 +422,7 @@ static int aml_pinconf_get(struct pinctrl_dev *pcdev, unsigned int pin,
return -EINVAL;
arg = 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = aml_pinconf_get_output(info, pin);
if (ret <= 0)
return -EINVAL;
@ -568,7 +568,7 @@ static int aml_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
switch (param) {
case PIN_CONFIG_DRIVE_STRENGTH_UA:
case PIN_CONFIG_OUTPUT_ENABLE:
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
arg = pinconf_to_config_argument(configs[i]);
break;
@ -592,7 +592,7 @@ static int aml_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
case PIN_CONFIG_OUTPUT_ENABLE:
ret = aml_pinconf_set_output(info, pin, arg);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = aml_pinconf_set_output_drive(info, pin, arg);
break;
default:

6
drivers/pinctrl/meson/pinctrl-meson.c
View File

@ -360,7 +360,7 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
switch (param) {
case PIN_CONFIG_DRIVE_STRENGTH_UA:
case PIN_CONFIG_OUTPUT_ENABLE:
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
arg = pinconf_to_config_argument(configs[i]);
break;
@ -384,7 +384,7 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
case PIN_CONFIG_OUTPUT_ENABLE:
ret = meson_pinconf_set_output(pc, pin, arg);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = meson_pinconf_set_output_drive(pc, pin, arg);
break;
default:
@ -502,7 +502,7 @@ static int meson_pinconf_get(struct pinctrl_dev *pcdev, unsigned int pin,
return -EINVAL;
arg = 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = meson_pinconf_get_output(pc, pin);
if (ret <= 0)
return -EINVAL;

6
drivers/pinctrl/nomadik/pinctrl-abx500.c
View File

@ -860,8 +860,8 @@ static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
pin, configs[i],
(param == PIN_CONFIG_OUTPUT) ? "output " : "input",
(param == PIN_CONFIG_OUTPUT) ?
(param == PIN_CONFIG_LEVEL) ? "output " : "input",
(param == PIN_CONFIG_LEVEL) ?
str_high_low(argument) :
(argument ? "pull up" : "pull down"));
@ -907,7 +907,7 @@ static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
ret = abx500_gpio_direction_input(chip, offset);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = abx500_gpio_direction_output(chip, offset,
argument);
break;

6
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
View File

@ -1700,13 +1700,13 @@ static int npcm7xx_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
rc = (!pu && pd);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
case PIN_CONFIG_INPUT_ENABLE:
ie = ioread32(bank->base + NPCM7XX_GP_N_IEM) & pinmask;
oe = ioread32(bank->base + NPCM7XX_GP_N_OE) & pinmask;
if (param == PIN_CONFIG_INPUT_ENABLE)
rc = (ie && !oe);
else if (param == PIN_CONFIG_OUTPUT)
else if (param == PIN_CONFIG_LEVEL)
rc = (!ie && oe);
break;
case PIN_CONFIG_DRIVE_PUSH_PULL:
@ -1765,7 +1765,7 @@ static int npcm7xx_config_set_one(struct npcm7xx_pinctrl *npcm,
iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
bank->direction_input(&bank->chip.gc, pin % bank->chip.gc.ngpio);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
bank->direction_output(&bank->chip.gc, pin % bank->chip.gc.ngpio, arg);
iowrite32(gpio, bank->base + NPCM7XX_GP_N_OES);
break;

6
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
View File

@ -2187,13 +2187,13 @@ static int npcm8xx_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
rc = !pu && pd;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
case PIN_CONFIG_INPUT_ENABLE:
ie = ioread32(bank->base + NPCM8XX_GP_N_IEM) & pinmask;
oe = ioread32(bank->base + NPCM8XX_GP_N_OE) & pinmask;
if (param == PIN_CONFIG_INPUT_ENABLE)
rc = (ie && !oe);
else if (param == PIN_CONFIG_OUTPUT)
else if (param == PIN_CONFIG_LEVEL)
rc = (!ie && oe);
break;
case PIN_CONFIG_DRIVE_PUSH_PULL:
@ -2251,7 +2251,7 @@ static int npcm8xx_config_set_one(struct npcm8xx_pinctrl *npcm,
iowrite32(gpio, bank->base + NPCM8XX_GP_N_OEC);
bank->direction_input(&bank->chip.gc, pin % bank->chip.gc.ngpio);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
bank->direction_output(&bank->chip.gc, pin % bank->chip.gc.ngpio, arg);
iowrite32(gpio, bank->base + NPCM8XX_GP_N_OES);
break;

6
drivers/pinctrl/pinconf-generic.c
View File

@ -48,7 +48,7 @@ static const struct pin_config_item conf_items[] = {
PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT_ENABLE, "input schmitt enabled", NULL, false),
PCONFDUMP(PIN_CONFIG_MODE_LOW_POWER, "pin low power", "mode", true),
PCONFDUMP(PIN_CONFIG_OUTPUT_ENABLE, "output enabled", NULL, false),
PCONFDUMP(PIN_CONFIG_OUTPUT, "pin output", "level", true),
PCONFDUMP(PIN_CONFIG_LEVEL, "pin output", "level", true),
PCONFDUMP(PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS, "output impedance", "ohms", true),
PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector", true),
PCONFDUMP(PIN_CONFIG_SLEEP_HARDWARE_STATE, "sleep hardware state", NULL, false),
@ -183,9 +183,9 @@ static const struct pinconf_generic_params dt_params[] = {
{ "low-power-enable", PIN_CONFIG_MODE_LOW_POWER, 1 },
{ "output-disable", PIN_CONFIG_OUTPUT_ENABLE, 0 },
{ "output-enable", PIN_CONFIG_OUTPUT_ENABLE, 1 },
{ "output-high", PIN_CONFIG_OUTPUT, 1, },
{ "output-high", PIN_CONFIG_LEVEL, 1, },
{ "output-impedance-ohms", PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS, 0 },
{ "output-low", PIN_CONFIG_OUTPUT, 0, },
{ "output-low", PIN_CONFIG_LEVEL, 0, },
{ "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
{ "sleep-hardware-state", PIN_CONFIG_SLEEP_HARDWARE_STATE, 0 },
{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },

2
drivers/pinctrl/pinctrl-at91-pio4.c
View File

@ -862,7 +862,7 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev,
conf |= ATMEL_PIO_IFSCEN_MASK;
}
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
conf |= ATMEL_PIO_DIR_MASK;
bank = ATMEL_PIO_BANK(pin_id);
pin = ATMEL_PIO_LINE(pin_id);

6
drivers/pinctrl/pinctrl-aw9523.c
View File

@ -215,7 +215,7 @@ static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r)
case PIN_CONFIG_OUTPUT_ENABLE:
reg = AW9523_REG_CONF_STATE(pin);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
reg = AW9523_REG_OUT_STATE(pin);
break;
default:
@ -249,7 +249,7 @@ static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
switch (param) {
case PIN_CONFIG_BIAS_PULL_UP:
case PIN_CONFIG_INPUT_ENABLE:
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
val &= BIT(regbit);
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
@ -301,7 +301,7 @@ static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
goto end;
switch (param) {
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
/* First, enable pin output */
rc = regmap_update_bits(awi->regmap,
AW9523_REG_CONF_STATE(pin),

2
drivers/pinctrl/pinctrl-cy8c95x0.c
View File

@ -808,7 +808,7 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip,
case PIN_CONFIG_MODE_PWM:
reg = CY8C95X0_SELPWM;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
reg = CY8C95X0_OUTPUT;
break;
case PIN_CONFIG_OUTPUT_ENABLE:

4
drivers/pinctrl/pinctrl-ingenic.c
View File

@ -4264,7 +4264,7 @@ static int ingenic_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
case PIN_CONFIG_BIAS_PULL_UP:
case PIN_CONFIG_BIAS_PULL_DOWN:
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
case PIN_CONFIG_SLEW_RATE:
continue;
default:
@ -4305,7 +4305,7 @@ static int ingenic_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
ingenic_set_schmitt_trigger(jzpc, pin, arg);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = pinctrl_gpio_direction_output(jzpc->gc,
pin - jzpc->gc->base);
if (ret)

2
drivers/pinctrl/pinctrl-k210.c
View File

@ -551,7 +551,7 @@ static int k210_pinconf_set_param(struct pinctrl_dev *pctldev,
else
val &= ~K210_PC_ST;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
k210_pinmux_set_pin_function(pctldev, pin, K210_PCF_CONSTANT);
val = readl(&pdata->fpioa->pins[pin]);
val |= K210_PC_MODE_OUT;

4
drivers/pinctrl/pinctrl-microchip-sgpio.c
View File

@ -371,7 +371,7 @@ static int sgpio_pinconf_get(struct pinctrl_dev *pctldev,
val = !bank->is_input;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if (bank->is_input)
return -EINVAL;
val = sgpio_output_get(priv, &addr);
@ -402,7 +402,7 @@ static int sgpio_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
arg = pinconf_to_config_argument(configs[cfg]);
switch (param) {
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if (bank->is_input)
return -EINVAL;
err = sgpio_output_set(priv, &addr, arg);

4
drivers/pinctrl/pinctrl-ocelot.c
View File

@ -1656,7 +1656,7 @@ static int ocelot_pinconf_get(struct pinctrl_dev *pctldev,
return err;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
err = regmap_read(info->map, REG(OCELOT_GPIO_OUT, info, pin),
&val);
if (err)
@ -1735,7 +1735,7 @@ static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
case PIN_CONFIG_OUTPUT_ENABLE:
case PIN_CONFIG_INPUT_ENABLE:
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
p = pin % 32;
if (arg)
regmap_write(info->map,

4
drivers/pinctrl/pinctrl-pic32.c
View File

@ -1905,7 +1905,7 @@ static int pic32_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
case PIN_CONFIG_INPUT_ENABLE:
arg = !!(readl(bank->reg_base + TRIS_REG) & mask);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
arg = !(readl(bank->reg_base + TRIS_REG) & mask);
break;
default:
@ -1960,7 +1960,7 @@ static int pic32_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
case PIN_CONFIG_INPUT_ENABLE:
pic32_gpio_direction_input(&bank->gpio_chip, offset);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
pic32_gpio_direction_output(&bank->gpio_chip,
offset, arg);
break;

4
drivers/pinctrl/pinctrl-rk805.c
View File

@ -541,7 +541,7 @@ static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
u32 arg = 0;
switch (param) {
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
case PIN_CONFIG_INPUT_ENABLE:
arg = rk805_gpio_get(&pci->gpio_chip, pin);
break;
@ -568,7 +568,7 @@ static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
arg = pinconf_to_config_argument(configs[i]);
switch (param) {
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
rk805_gpio_set(&pci->gpio_chip, pin, arg);
rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
break;

6
drivers/pinctrl/pinctrl-rockchip.c
View File

@ -3272,7 +3272,7 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
param = pinconf_to_config_param(configs[i]);
arg = pinconf_to_config_argument(configs[i]);
if (param == PIN_CONFIG_OUTPUT || param == PIN_CONFIG_INPUT_ENABLE) {
if (param == PIN_CONFIG_LEVEL || param == PIN_CONFIG_INPUT_ENABLE) {
/*
* Check for gpio driver not being probed yet.
* The lock makes sure that either gpio-probe has completed
@ -3313,7 +3313,7 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
if (rc)
return rc;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
rc = rockchip_set_mux(bank, pin - bank->pin_base,
RK_FUNC_GPIO);
if (rc != RK_FUNC_GPIO)
@ -3392,7 +3392,7 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
arg = 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
rc = rockchip_get_mux(bank, pin - bank->pin_base);
if (rc != RK_FUNC_GPIO)
return -EINVAL;

2
drivers/pinctrl/pinctrl-rp1.c
View File

@ -1440,7 +1440,7 @@ static int rp1_pinconf_set(struct pinctrl_dev *pctldev, unsigned int offset,
rp1_output_enable(pin, arg);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
rp1_set_value(pin, arg);
rp1_set_dir(pin, RP1_DIR_OUTPUT);
rp1_set_fsel(pin, RP1_FSEL_GPIO);

2
drivers/pinctrl/pinctrl-scmi.c
View File

@ -253,7 +253,7 @@ static int pinctrl_scmi_map_pinconf_type(enum pin_config_param param,
case PIN_CONFIG_MODE_LOW_POWER:
*type = SCMI_PIN_LOW_POWER_MODE;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
*type = SCMI_PIN_OUTPUT_VALUE;
break;
case PIN_CONFIG_OUTPUT_ENABLE:

4
drivers/pinctrl/pinctrl-stmfx.c
View File

@ -267,7 +267,7 @@ static int stmfx_pinconf_get(struct pinctrl_dev *pctldev,
if ((!dir && !type) || (dir && type))
arg = 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if (dir)
return -EINVAL;
@ -334,7 +334,7 @@ static int stmfx_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
if (ret)
return ret;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = stmfx_gpio_direction_output(&pctl->gpio_chip,
pin, arg);
if (ret)

8
drivers/pinctrl/pinctrl-sx150x.c
View File

@ -611,7 +611,7 @@ static int sx150x_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
if (sx150x_pin_is_oscio(pctl, pin)) {
switch (param) {
case PIN_CONFIG_DRIVE_PUSH_PULL:
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = regmap_read(pctl->regmap,
pctl->data->pri.x789.reg_clock,
&data);
@ -705,7 +705,7 @@ static int sx150x_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
}
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = sx150x_gpio_get_direction(&pctl->gpio, pin);
if (ret < 0)
return ret;
@ -744,7 +744,7 @@ static int sx150x_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
arg = pinconf_to_config_argument(configs[i]);
if (sx150x_pin_is_oscio(pctl, pin)) {
if (param == PIN_CONFIG_OUTPUT) {
if (param == PIN_CONFIG_LEVEL) {
ret = sx150x_gpio_direction_output(&pctl->gpio,
pin, arg);
if (ret < 0)
@ -816,7 +816,7 @@ static int sx150x_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
ret = sx150x_gpio_direction_output(&pctl->gpio,
pin, arg);
if (ret < 0)

8
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
View File

@ -174,7 +174,7 @@ static int lpi_config_get(struct pinctrl_dev *pctldev,
arg = 1;
break;
case PIN_CONFIG_INPUT_ENABLE:
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if (is_out)
arg = 1;
break;
@ -252,7 +252,7 @@ static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group,
case PIN_CONFIG_INPUT_ENABLE:
output_enabled = false;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
output_enabled = true;
value = arg;
break;
@ -314,7 +314,7 @@ static int lpi_gpio_direction_output(struct gpio_chip *chip,
struct lpi_pinctrl *state = gpiochip_get_data(chip);
unsigned long config;
config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val);
config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, val);
return lpi_config_set(state->ctrl, pin, &config, 1);
}
@ -332,7 +332,7 @@ static int lpi_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
struct lpi_pinctrl *state = gpiochip_get_data(chip);
unsigned long config;
config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value);
config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, value);
return lpi_config_set(state->ctrl, pin, &config, 1);
}

6
drivers/pinctrl/qcom/pinctrl-msm.c
View File

@ -295,7 +295,7 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
*bit = g->drv_bit;
*mask = 7;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
case PIN_CONFIG_INPUT_ENABLE:
case PIN_CONFIG_OUTPUT_ENABLE:
*bit = g->oe_bit;
@ -385,7 +385,7 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev,
case PIN_CONFIG_DRIVE_STRENGTH:
arg = msm_regval_to_drive(arg);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
/* Pin is not output */
if (!arg)
return -EINVAL;
@ -464,7 +464,7 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
else
arg = (arg / 2) - 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
/* set output value */
raw_spin_lock_irqsave(&pctrl->lock, flags);
val = msm_readl_io(pctrl, g);

8
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
View File

@ -438,7 +438,7 @@ static int pmic_gpio_config_get(struct pinctrl_dev *pctldev,
case PIN_CONFIG_OUTPUT_ENABLE:
arg = pad->output_enabled;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
arg = pad->out_value;
break;
case PMIC_GPIO_CONF_PULL_UP:
@ -530,7 +530,7 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
case PIN_CONFIG_OUTPUT_ENABLE:
pad->output_enabled = arg ? true : false;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
pad->output_enabled = true;
pad->out_value = arg;
break;
@ -737,7 +737,7 @@ static int pmic_gpio_direction_output(struct gpio_chip *chip,
struct pmic_gpio_state *state = gpiochip_get_data(chip);
unsigned long config;
config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val);
config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, val);
return pmic_gpio_config_set(state->ctrl, pin, &config, 1);
}
@ -769,7 +769,7 @@ static int pmic_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
struct pmic_gpio_state *state = gpiochip_get_data(chip);
unsigned long config;
config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value);
config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, value);
return pmic_gpio_config_set(state->ctrl, pin, &config, 1);
}

8
drivers/pinctrl/qcom/pinctrl-spmi-mpp.c
View File

@ -370,7 +370,7 @@ static int pmic_mpp_config_get(struct pinctrl_dev *pctldev,
return -EINVAL;
arg = 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
arg = pad->out_value;
break;
case PMIC_MPP_CONF_DTEST_SELECTOR:
@ -447,7 +447,7 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
case PIN_CONFIG_INPUT_ENABLE:
pad->input_enabled = arg ? true : false;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
pad->output_enabled = true;
pad->out_value = arg;
break;
@ -576,7 +576,7 @@ static int pmic_mpp_direction_output(struct gpio_chip *chip,
struct pmic_mpp_state *state = gpiochip_get_data(chip);
unsigned long config;
config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val);
config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, val);
return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
}
@ -605,7 +605,7 @@ static int pmic_mpp_set(struct gpio_chip *chip, unsigned int pin, int value)
struct pmic_mpp_state *state = gpiochip_get_data(chip);
unsigned long config;
config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value);
config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, value);
return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
}

4
drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
View File

@ -282,7 +282,7 @@ static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
return -EINVAL;
arg = 1;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if (pin->mode & PM8XXX_GPIO_MODE_OUTPUT)
arg = pin->output_value;
else
@ -364,7 +364,7 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
pin->mode = PM8XXX_GPIO_MODE_INPUT;
banks |= BIT(0) | BIT(1);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
pin->mode = PM8XXX_GPIO_MODE_OUTPUT;
pin->output_value = !!arg;
banks |= BIT(0) | BIT(1);

4
drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c
View File

@ -337,7 +337,7 @@ static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
case PIN_CONFIG_INPUT_ENABLE:
arg = pin->input;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
arg = pin->output_value;
break;
case PIN_CONFIG_POWER_SOURCE:
@ -392,7 +392,7 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
case PIN_CONFIG_INPUT_ENABLE:
pin->input = true;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
pin->output = true;
pin->output_value = !!arg;
break;

2
drivers/pinctrl/renesas/pinctrl-rza1.c
View File

@ -933,7 +933,7 @@ static int rza1_parse_pinmux_node(struct rza1_pinctrl *rza1_pctl,
case PIN_CONFIG_INPUT_ENABLE:
pinmux_flags |= MUX_FLAGS_SWIO_INPUT;
break;
case PIN_CONFIG_OUTPUT: /* for DT backwards compatibility */
case PIN_CONFIG_LEVEL: /* for DT backwards compatibility */
case PIN_CONFIG_OUTPUT_ENABLE:
pinmux_flags |= MUX_FLAGS_SWIO_OUTPUT;
break;

2
drivers/pinctrl/stm32/pinctrl-stm32.c
View File

@ -1236,7 +1236,7 @@ static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev,
case PIN_CONFIG_BIAS_PULL_DOWN:
ret = stm32_pconf_set_bias(bank, offset, 2);
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
__stm32_gpio_set(bank, offset, arg);
ret = stm32_pmx_gpio_set_direction(pctldev, range, pin, false);
break;

4
drivers/pinctrl/sunplus/sppctl.c
View File

@ -488,7 +488,7 @@ static int sppctl_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
case PIN_CONFIG_INPUT_ENABLE:
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
return sppctl_gpio_direction_output(chip, offset, 0);
case PIN_CONFIG_PERSIST_STATE:
@ -580,7 +580,7 @@ static int sppctl_pin_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
arg = 0;
break;
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
if (!sppctl_first_get(&pctl->spp_gchip->chip, pin))
return -EINVAL;
if (!sppctl_master_get(&pctl->spp_gchip->chip, pin))

12
include/linux/pinctrl/pinconf-generic.h
View File

@ -88,9 +88,13 @@ struct pinctrl_map;
* passed in the argument on a custom form, else just use argument 1
* to indicate low power mode, argument 0 turns low power mode off.
* @PIN_CONFIG_MODE_PWM: this will configure the pin for PWM
* @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a
* value on the line. Use argument 1 to indicate high level, argument 0 to
* indicate low level. (Please see Documentation/driver-api/pin-control.rst,
* @PIN_CONFIG_LEVEL: setting this will configure the pin as an output and
* drive a value on the line. Use argument 1 to indicate high level,
* argument 0 to indicate low level. Conversely the value of the line
* can be read using this parameter, if and only if that value can be
* represented as a binary 0 or 1 where 0 indicate a low voltage level
* and 1 indicate a high voltage level.
* (Please see Documentation/driver-api/pin-control.rst,
* section "GPIO mode pitfalls" for a discussion around this parameter.)
* @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode
* without driving a value there. For most platforms this reduces to
@ -137,7 +141,7 @@ enum pin_config_param {
PIN_CONFIG_INPUT_SCHMITT_UV,
PIN_CONFIG_MODE_LOW_POWER,
PIN_CONFIG_MODE_PWM,
PIN_CONFIG_OUTPUT,
PIN_CONFIG_LEVEL,
PIN_CONFIG_OUTPUT_ENABLE,
PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS,
PIN_CONFIG_PERSIST_STATE,

2
sound/hda/codecs/side-codecs/cirrus_scodec_test.c
View File

@ -69,7 +69,7 @@ static int cirrus_scodec_test_gpio_set_config(struct gpio_chip *gc,
unsigned long config)
{
switch (pinconf_to_config_param(config)) {
case PIN_CONFIG_OUTPUT:
case PIN_CONFIG_LEVEL:
case PIN_CONFIG_OUTPUT_ENABLE:
return -EOPNOTSUPP;
default: