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clk: zynq: pll: convert from round_rate() to determine_rate() 

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>
This commit is contained in:
Brian Masney 2025-08-11 11:19:02 -04:00
parent 193650c7a8
commit 1547747b55
1 changed files with 7 additions and 5 deletions
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12
drivers/clk/zynq/pll.c
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@ -48,18 +48,20 @@ struct zynq_pll {
* @prate: Clock frequency of parent clock
* Return: frequency closest to @rate the hardware can generate.
*/
static long zynq_pll_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *prate)
static int zynq_pll_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
u32 fbdiv;
fbdiv = DIV_ROUND_CLOSEST(rate, *prate);
fbdiv = DIV_ROUND_CLOSEST(req->rate, req->best_parent_rate);
if (fbdiv < PLL_FBDIV_MIN)
fbdiv = PLL_FBDIV_MIN;
else if (fbdiv > PLL_FBDIV_MAX)
fbdiv = PLL_FBDIV_MAX;
return *prate * fbdiv;
req->rate = req->best_parent_rate * fbdiv;
return 0;
}
/**
@ -167,7 +169,7 @@ static const struct clk_ops zynq_pll_ops = {
.enable = zynq_pll_enable,
.disable = zynq_pll_disable,
.is_enabled = zynq_pll_is_enabled,
.round_rate = zynq_pll_round_rate,
.determine_rate = zynq_pll_determine_rate,
.recalc_rate = zynq_pll_recalc_rate
};