mirror of https://github.com/torvalds/linux.git
soc: arm code changes for 6.19
These are very minimal changes for 32-bit Arm platform code, enabling SMP bringup for one more SoC variant (mt6582) among spelling changes and a build warning fix. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmky7CAACgkQmmx57+YA GNmvOw//djF61SwbdYIocFKa0hJjSM7EwRTOJeB5vejiwfu74isemMIfNrAgbfIC pZhjl65uyQNUymnrN0yzp64mipDaCG6UklcRfu0SzSHxTHgkRrDUtKxeauza0pyv YrGQhn/G0GVUNVnQIXJwZQYJDwtNQMuRhGn9/hJdBQ8JlvQStDgh6LCGChbJpmjh L2qj7fXTxAPwIdWQYkuxH4WQFiaVEjdG06rTviBHTwm1GxV6cu6aAg+5G/+gxd+h ZXoswd6zURNGfP1+YFfF+o9DlZ+Z4Kyvhg421Wizc11HMQ9HXHzhrjgZCEgjO0kL VfnInimkoUZOOabNM1c57A4clSdVKdmjfAq1JJkHv7w5GOY2zwkULwrRJ+ybKoIl QUpWs7dbU2WqLRa69whrHTXdluCGd/lFLQDemHFt84FZfX+D6kKgbXrjIxGjrCRs v1EOV92G7o+VJZpa+A9vfEseXD2MisWFfkdozXcs+jl54hDJkH5X9kxlWP/qAwI3 ljxomd1v2MzzbZFGl2rJQx78HbsoSZrpi4KiacdRJ3MXeoNi2xpQeoxlu6R8jnKW oB0sF5+2eY0O3++lN/E2PpJHB8LNSWmErP9P9zeKp8KkLPhnpEb5l6Fs8k60fzQP Adz+NJpxPs9Hu2SPCsRxrX9RrzZeXKefC3Gs4lkkFCSNfhxXtCo= =Ygkj -----END PGP SIGNATURE----- Merge tag 'soc-arm-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC ARM code updates from Arnd Bergmann: "These are very minimal changes for 32-bit Arm platform code, enabling SMP bringup for one more SoC variant (mt6582) among spelling changes and a build warning fix" * tag 'soc-arm-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: omap1: avoid symbol clashes in fiq handler ARM: gemini: fix typos in comments ARM: versatile: Fix typo in versatile.c ARM: OMAP2+: Fix falg->flag typo in omap_smc2() ARM: mediatek: add MT6582 smp bring up code ARM: mediatek: add board_dt_compat entry for the MT6582 SoC
This commit is contained in:
Linus Torvalds
commit
09cab48db9
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@ -34,7 +34,7 @@ static void gemini_idle(void)
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{
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/*
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* Because of broken hardware we have to enable interrupts or the CPU
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* will never wakeup... Acctualy it is not very good to enable
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* will never wakeup... Actually it is not very good to enable
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* interrupts first since scheduler can miss a tick, but there is
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* no other way around this. Platforms that needs it for power saving
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* should enable it in init code, since by default it is
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@ -19,6 +19,10 @@ config MACH_MT6572
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bool "MediaTek MT6572 SoCs support"
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default ARCH_MEDIATEK
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config MACH_MT6582
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bool "MediaTek MT6582 SoCs support"
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default ARCH_MEDIATEK
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config MACH_MT6589
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bool "MediaTek MT6589 SoCs support"
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default ARCH_MEDIATEK
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@ -39,6 +39,7 @@ static void __init mediatek_timer_init(void)
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static const char * const mediatek_board_dt_compat[] = {
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"mediatek,mt2701",
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"mediatek,mt6572",
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"mediatek,mt6582",
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"mediatek,mt6589",
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"mediatek,mt6592",
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"mediatek,mt7623",
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@ -56,6 +56,7 @@ static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
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static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
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{ .compatible = "mediatek,mt6572", .data = &mtk_mt6572_boot },
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{ .compatible = "mediatek,mt6582", .data = &mtk_mt7623_boot },
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{ .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot },
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{ .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot },
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{ .compatible = "mediatek,mt7629", .data = &mtk_mt7623_boot },
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@ -97,7 +97,7 @@ ENTRY(qwerty_fiqin_start)
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ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status
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bics r13, r13, r11 @ clear masked - any left?
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beq exit @ none - spurious FIQ? exit
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beq .Lexit @ none - spurious FIQ? exit
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ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number
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@ -105,25 +105,25 @@ ENTRY(qwerty_fiqin_start)
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str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
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cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt?
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beq gpio @ yes - process it
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beq .Lgpio @ yes - process it
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mov r8, #1
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orr r8, r11, r8, lsl r10 @ mask spurious interrupt
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str r8, [r12, #IRQ_MIR_REG_OFFSET]
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exit:
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.Lexit:
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subs pc, lr, #4 @ return from FIQ
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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@@@@@@@@@@@@@@@@@@@@@@@@@@@
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gpio: @ GPIO bank interrupt handler
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.Lgpio: @ GPIO bank interrupt handler
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ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank
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ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask
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restart:
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.Lrestart:
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ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits
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bics r13, r13, r11 @ clear masked - any left?
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beq exit @ no - spurious interrupt? exit
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beq .Lexit @ no - spurious interrupt? exit
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orr r11, r11, r13 @ mask all requested interrupts
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str r11, [r12, #OMAP1510_GPIO_INT_MASK]
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@ -131,7 +131,7 @@ restart:
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str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts
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ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set?
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beq hksw @ no - try next source
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beq .Lhksw @ no - try next source
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@@@@@@@@@@@@@@@@@@@@@@
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@ -145,10 +145,10 @@ restart:
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ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state
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cmp r10, #0 @ are we expecting start bit?
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bne data @ no - go to data processing
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bne .Ldata @ no - go to data processing
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ands r8, r8, #KEYBRD_DATA_MASK @ check start bit - detected?
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beq hksw @ no - try next source
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beq .Lhksw @ no - try next source
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@ r8 contains KEYBRD_DATA_MASK, use it
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str r8, [r9, #BUF_STATE] @ enter data processing state
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@ -162,9 +162,9 @@ restart:
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mvn r11, #KEYBRD_CLK_MASK @ prepare all except kbd mask
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str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register
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b restart @ restart
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b .Lrestart @ restart
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data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
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.Ldata: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
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@ r8 still contains GPIO input bits
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ands r8, r8, #KEYBRD_DATA_MASK @ is keyboard data line low?
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@ -175,7 +175,7 @@ data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
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mov r10, r10, lsl #1 @ shift mask left
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bics r10, r10, #0x800 @ have we got all the bits?
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strne r10, [r9, #BUF_MASK] @ not yet - store the mask
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bne restart @ and restart
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bne .Lrestart @ and restart
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@ r10 already contains 0, reuse it
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str r10, [r9, #BUF_STATE] @ reset state to start
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@ -189,7 +189,7 @@ data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
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ldr r10, [r9, #BUF_KEYS_CNT] @ get saved keystrokes count
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ldr r8, [r9, #BUF_BUF_LEN] @ get buffer size
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cmp r10, r8 @ is buffer full?
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beq hksw @ yes - key lost, next source
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beq .Lhksw @ yes - key lost, next source
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add r10, r10, #1 @ incremet keystrokes counter
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str r10, [r9, #BUF_KEYS_CNT]
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@ -213,9 +213,9 @@ data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
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@@@@@@@@@@@@@@@@@@@@@@@@
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hksw: @Is hook switch interrupt requested?
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.Lhksw: @Is hook switch interrupt requested?
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tst r13, #HOOK_SWITCH_MASK @ is hook switch status bit set?
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beq mdm @ no - try next source
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beq .Lmdm @ no - try next source
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@@@@@@@@@@@@@@@@@@@@@@@@
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@ -230,9 +230,9 @@ hksw: @Is hook switch interrupt requested?
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@@@@@@@@@@@@@@@@@@@@@@@@
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mdm: @Is it a modem interrupt?
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.Lmdm: @Is it a modem interrupt?
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tst r13, #MODEM_IRQ_MASK @ is modem status bit set?
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beq irq @ no - check for next interrupt
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beq .Lirq @ no - check for next interrupt
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@@@@@@@@@@@@@@@@@@@@@@@@
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@ -245,13 +245,13 @@ mdm: @Is it a modem interrupt?
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@@@@@@@@@@@@@@@@@@@@@@@@
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irq: @ Place deferred_fiq interrupt request
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.Lirq: @ Place deferred_fiq interrupt request
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ldr r12, deferred_fiq_ih_base @ set pointer to IRQ handler
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mov r10, #DEFERRED_FIQ_MASK @ set deferred_fiq bit
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str r10, [r12, #IRQ_ISR_REG_OFFSET] @ place it in the ISR register
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ldr r12, omap1510_gpio_base @ set pointer back to GPIO bank
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b restart @ check for next GPIO interrupt
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b .Lrestart @ check for next GPIO interrupt
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@@@@@@@@@@@@@@@@@@@@@@@@@@@
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@ -68,7 +68,7 @@ extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
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u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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extern void omap_smccc_smc(u32 fn, u32 arg);
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extern void omap_smc1(u32 fn, u32 arg);
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extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
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extern u32 omap_smc2(u32 id, u32 flag, u32 pargs);
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extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
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extern int omap_secure_ram_reserve_memblock(void);
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extern u32 save_secure_ram_context(u32 args_pa);
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@ -32,7 +32,7 @@ ENTRY(_omap_smc1)
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ENDPROC(_omap_smc1)
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/**
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* u32 omap_smc2(u32 id, u32 falg, u32 pargs)
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* u32 omap_smc2(u32 id, u32 flag, u32 pargs)
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* Low level common routine for secure HAL and PPA APIs.
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* @id: Application ID of HAL APIs
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* @flag: Flag to indicate the criticality of operation
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@ -134,7 +134,7 @@ static void __init versatile_dt_pci_init(void)
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val = readl(versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET);
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if (val & 1) {
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/*
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* Enable PCI accesses. Note that the documentaton is
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* Enable PCI accesses. Note that the documentation is
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* inconsistent whether or not this is needed, but the old
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* driver had it so we will keep it.
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*/
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