soc: arm code changes for 6.19

These are very minimal changes for 32-bit Arm platform code, enabling
 SMP bringup for one more SoC variant (mt6582) among spelling changes
 and a build warning fix.
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Merge tag 'soc-arm-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC ARM code updates from Arnd Bergmann:
 "These are very minimal changes for 32-bit Arm platform code, enabling
  SMP bringup for one more SoC variant (mt6582) among spelling changes
  and a build warning fix"

* tag 'soc-arm-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: omap1: avoid symbol clashes in fiq handler
  ARM: gemini: fix typos in comments
  ARM: versatile: Fix typo in versatile.c
  ARM: OMAP2+: Fix falg->flag typo in omap_smc2()
  ARM: mediatek: add MT6582 smp bring up code
  ARM: mediatek: add board_dt_compat entry for the MT6582 SoC
This commit is contained in:
Linus Torvalds 2025-12-05 17:23:12 -08:00
commit 09cab48db9
8 changed files with 29 additions and 23 deletions

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@ -34,7 +34,7 @@ static void gemini_idle(void)
{ {
/* /*
* Because of broken hardware we have to enable interrupts or the CPU * Because of broken hardware we have to enable interrupts or the CPU
* will never wakeup... Acctualy it is not very good to enable * will never wakeup... Actually it is not very good to enable
* interrupts first since scheduler can miss a tick, but there is * interrupts first since scheduler can miss a tick, but there is
* no other way around this. Platforms that needs it for power saving * no other way around this. Platforms that needs it for power saving
* should enable it in init code, since by default it is * should enable it in init code, since by default it is

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@ -19,6 +19,10 @@ config MACH_MT6572
bool "MediaTek MT6572 SoCs support" bool "MediaTek MT6572 SoCs support"
default ARCH_MEDIATEK default ARCH_MEDIATEK
config MACH_MT6582
bool "MediaTek MT6582 SoCs support"
default ARCH_MEDIATEK
config MACH_MT6589 config MACH_MT6589
bool "MediaTek MT6589 SoCs support" bool "MediaTek MT6589 SoCs support"
default ARCH_MEDIATEK default ARCH_MEDIATEK

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@ -39,6 +39,7 @@ static void __init mediatek_timer_init(void)
static const char * const mediatek_board_dt_compat[] = { static const char * const mediatek_board_dt_compat[] = {
"mediatek,mt2701", "mediatek,mt2701",
"mediatek,mt6572", "mediatek,mt6572",
"mediatek,mt6582",
"mediatek,mt6589", "mediatek,mt6589",
"mediatek,mt6592", "mediatek,mt6592",
"mediatek,mt7623", "mediatek,mt7623",

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@ -56,6 +56,7 @@ static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
static const struct of_device_id mtk_smp_boot_infos[] __initconst = { static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
{ .compatible = "mediatek,mt6572", .data = &mtk_mt6572_boot }, { .compatible = "mediatek,mt6572", .data = &mtk_mt6572_boot },
{ .compatible = "mediatek,mt6582", .data = &mtk_mt7623_boot },
{ .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot }, { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot },
{ .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot }, { .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot },
{ .compatible = "mediatek,mt7629", .data = &mtk_mt7623_boot }, { .compatible = "mediatek,mt7629", .data = &mtk_mt7623_boot },

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@ -97,7 +97,7 @@ ENTRY(qwerty_fiqin_start)
ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status
bics r13, r13, r11 @ clear masked - any left? bics r13, r13, r11 @ clear masked - any left?
beq exit @ none - spurious FIQ? exit beq .Lexit @ none - spurious FIQ? exit
ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number
@ -105,25 +105,25 @@ ENTRY(qwerty_fiqin_start)
str r8, [r12, #IRQ_CONTROL_REG_OFFSET] str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt? cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt?
beq gpio @ yes - process it beq .Lgpio @ yes - process it
mov r8, #1 mov r8, #1
orr r8, r11, r8, lsl r10 @ mask spurious interrupt orr r8, r11, r8, lsl r10 @ mask spurious interrupt
str r8, [r12, #IRQ_MIR_REG_OFFSET] str r8, [r12, #IRQ_MIR_REG_OFFSET]
exit: .Lexit:
subs pc, lr, #4 @ return from FIQ subs pc, lr, #4 @ return from FIQ
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@@@@
gpio: @ GPIO bank interrupt handler .Lgpio: @ GPIO bank interrupt handler
ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank
ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask
restart: .Lrestart:
ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits
bics r13, r13, r11 @ clear masked - any left? bics r13, r13, r11 @ clear masked - any left?
beq exit @ no - spurious interrupt? exit beq .Lexit @ no - spurious interrupt? exit
orr r11, r11, r13 @ mask all requested interrupts orr r11, r11, r13 @ mask all requested interrupts
str r11, [r12, #OMAP1510_GPIO_INT_MASK] str r11, [r12, #OMAP1510_GPIO_INT_MASK]
@ -131,7 +131,7 @@ restart:
str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts
ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set? ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set?
beq hksw @ no - try next source beq .Lhksw @ no - try next source
@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@
@ -145,10 +145,10 @@ restart:
ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state
cmp r10, #0 @ are we expecting start bit? cmp r10, #0 @ are we expecting start bit?
bne data @ no - go to data processing bne .Ldata @ no - go to data processing
ands r8, r8, #KEYBRD_DATA_MASK @ check start bit - detected? ands r8, r8, #KEYBRD_DATA_MASK @ check start bit - detected?
beq hksw @ no - try next source beq .Lhksw @ no - try next source
@ r8 contains KEYBRD_DATA_MASK, use it @ r8 contains KEYBRD_DATA_MASK, use it
str r8, [r9, #BUF_STATE] @ enter data processing state str r8, [r9, #BUF_STATE] @ enter data processing state
@ -162,9 +162,9 @@ restart:
mvn r11, #KEYBRD_CLK_MASK @ prepare all except kbd mask mvn r11, #KEYBRD_CLK_MASK @ prepare all except kbd mask
str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register
b restart @ restart b .Lrestart @ restart
data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask .Ldata: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
@ r8 still contains GPIO input bits @ r8 still contains GPIO input bits
ands r8, r8, #KEYBRD_DATA_MASK @ is keyboard data line low? ands r8, r8, #KEYBRD_DATA_MASK @ is keyboard data line low?
@ -175,7 +175,7 @@ data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
mov r10, r10, lsl #1 @ shift mask left mov r10, r10, lsl #1 @ shift mask left
bics r10, r10, #0x800 @ have we got all the bits? bics r10, r10, #0x800 @ have we got all the bits?
strne r10, [r9, #BUF_MASK] @ not yet - store the mask strne r10, [r9, #BUF_MASK] @ not yet - store the mask
bne restart @ and restart bne .Lrestart @ and restart
@ r10 already contains 0, reuse it @ r10 already contains 0, reuse it
str r10, [r9, #BUF_STATE] @ reset state to start str r10, [r9, #BUF_STATE] @ reset state to start
@ -189,7 +189,7 @@ data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
ldr r10, [r9, #BUF_KEYS_CNT] @ get saved keystrokes count ldr r10, [r9, #BUF_KEYS_CNT] @ get saved keystrokes count
ldr r8, [r9, #BUF_BUF_LEN] @ get buffer size ldr r8, [r9, #BUF_BUF_LEN] @ get buffer size
cmp r10, r8 @ is buffer full? cmp r10, r8 @ is buffer full?
beq hksw @ yes - key lost, next source beq .Lhksw @ yes - key lost, next source
add r10, r10, #1 @ incremet keystrokes counter add r10, r10, #1 @ incremet keystrokes counter
str r10, [r9, #BUF_KEYS_CNT] str r10, [r9, #BUF_KEYS_CNT]
@ -213,9 +213,9 @@ data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@
hksw: @Is hook switch interrupt requested? .Lhksw: @Is hook switch interrupt requested?
tst r13, #HOOK_SWITCH_MASK @ is hook switch status bit set? tst r13, #HOOK_SWITCH_MASK @ is hook switch status bit set?
beq mdm @ no - try next source beq .Lmdm @ no - try next source
@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@
@ -230,9 +230,9 @@ hksw: @Is hook switch interrupt requested?
@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@
mdm: @Is it a modem interrupt? .Lmdm: @Is it a modem interrupt?
tst r13, #MODEM_IRQ_MASK @ is modem status bit set? tst r13, #MODEM_IRQ_MASK @ is modem status bit set?
beq irq @ no - check for next interrupt beq .Lirq @ no - check for next interrupt
@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@
@ -245,13 +245,13 @@ mdm: @Is it a modem interrupt?
@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@
irq: @ Place deferred_fiq interrupt request .Lirq: @ Place deferred_fiq interrupt request
ldr r12, deferred_fiq_ih_base @ set pointer to IRQ handler ldr r12, deferred_fiq_ih_base @ set pointer to IRQ handler
mov r10, #DEFERRED_FIQ_MASK @ set deferred_fiq bit mov r10, #DEFERRED_FIQ_MASK @ set deferred_fiq bit
str r10, [r12, #IRQ_ISR_REG_OFFSET] @ place it in the ISR register str r10, [r12, #IRQ_ISR_REG_OFFSET] @ place it in the ISR register
ldr r12, omap1510_gpio_base @ set pointer back to GPIO bank ldr r12, omap1510_gpio_base @ set pointer back to GPIO bank
b restart @ check for next GPIO interrupt b .Lrestart @ check for next GPIO interrupt
@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@@@@

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@ -68,7 +68,7 @@ extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
u32 arg1, u32 arg2, u32 arg3, u32 arg4); u32 arg1, u32 arg2, u32 arg3, u32 arg4);
extern void omap_smccc_smc(u32 fn, u32 arg); extern void omap_smccc_smc(u32 fn, u32 arg);
extern void omap_smc1(u32 fn, u32 arg); extern void omap_smc1(u32 fn, u32 arg);
extern u32 omap_smc2(u32 id, u32 falg, u32 pargs); extern u32 omap_smc2(u32 id, u32 flag, u32 pargs);
extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs); extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
extern int omap_secure_ram_reserve_memblock(void); extern int omap_secure_ram_reserve_memblock(void);
extern u32 save_secure_ram_context(u32 args_pa); extern u32 save_secure_ram_context(u32 args_pa);

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@ -32,7 +32,7 @@ ENTRY(_omap_smc1)
ENDPROC(_omap_smc1) ENDPROC(_omap_smc1)
/** /**
* u32 omap_smc2(u32 id, u32 falg, u32 pargs) * u32 omap_smc2(u32 id, u32 flag, u32 pargs)
* Low level common routine for secure HAL and PPA APIs. * Low level common routine for secure HAL and PPA APIs.
* @id: Application ID of HAL APIs * @id: Application ID of HAL APIs
* @flag: Flag to indicate the criticality of operation * @flag: Flag to indicate the criticality of operation

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@ -134,7 +134,7 @@ static void __init versatile_dt_pci_init(void)
val = readl(versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET); val = readl(versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET);
if (val & 1) { if (val & 1) {
/* /*
* Enable PCI accesses. Note that the documentaton is * Enable PCI accesses. Note that the documentation is
* inconsistent whether or not this is needed, but the old * inconsistent whether or not this is needed, but the old
* driver had it so we will keep it. * driver had it so we will keep it.
*/ */