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clk: stm32f4: convert from round_rate() to determine_rate() 

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>
This commit is contained in:
Brian Masney 2025-08-11 11:18:49 -04:00
parent 639baa3ce2
commit 028b0eb1c9
1 changed files with 15 additions and 11 deletions
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26
drivers/clk/clk-stm32f4.c
View File

@ -443,8 +443,8 @@ static unsigned long clk_apb_mul_recalc_rate(struct clk_hw *hw,
return parent_rate;
}
static long clk_apb_mul_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *prate)
static int clk_apb_mul_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct clk_apb_mul *am = to_clk_apb_mul(hw);
unsigned long mult = 1;
@ -453,12 +453,14 @@ static long clk_apb_mul_round_rate(struct clk_hw *hw, unsigned long rate,
mult = 2;
if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
unsigned long best_parent = rate / mult;
unsigned long best_parent = req->rate / mult;
*prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
}
return *prate * mult;
req->rate = req->best_parent_rate * mult;
return 0;
}
static int clk_apb_mul_set_rate(struct clk_hw *hw, unsigned long rate,
@ -474,7 +476,7 @@ static int clk_apb_mul_set_rate(struct clk_hw *hw, unsigned long rate,
}
static const struct clk_ops clk_apb_mul_factor_ops = {
.round_rate = clk_apb_mul_round_rate,
.determine_rate = clk_apb_mul_determine_rate,
.set_rate = clk_apb_mul_set_rate,
.recalc_rate = clk_apb_mul_recalc_rate,
};
@ -670,21 +672,23 @@ static unsigned long stm32f4_pll_recalc(struct clk_hw *hw,
return parent_rate * n;
}
static long stm32f4_pll_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *prate)
static int stm32f4_pll_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct clk_gate *gate = to_clk_gate(hw);
struct stm32f4_pll *pll = to_stm32f4_pll(gate);
unsigned long n;
n = rate / *prate;
n = req->rate / req->best_parent_rate;
if (n < pll->n_start)
n = pll->n_start;
else if (n > 432)
n = 432;
return *prate * n;
req->rate = req->best_parent_rate * n;
return 0;
}
static void stm32f4_pll_set_ssc(struct clk_hw *hw, unsigned long parent_rate,
@ -749,7 +753,7 @@ static const struct clk_ops stm32f4_pll_gate_ops = {
.disable = stm32f4_pll_disable,
.is_enabled = stm32f4_pll_is_enabled,
.recalc_rate = stm32f4_pll_recalc,
.round_rate = stm32f4_pll_round_rate,
.determine_rate = stm32f4_pll_determine_rate,
.set_rate = stm32f4_pll_set_rate,
};