mirror of https://github.com/torvalds/linux.git
fsldma: Set correct dma_mask based on hw capability
The driver currently hardcodes DMA_BIT_MASK to 36-bits, which is only correct on eloplus: elo3 supports 40-bits eloplus supports 36-bits elo supports 32-bits This is based on 0x08 cdar register documention in the respective reference manuals. Set the dma mask accordingly. Feedback from Arnd Bergmann: - Use match data to set address bit mask Signed-off-by: Ben Collins <bcollins@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vkoul@kernel.org> Cc: linuxppc-dev@lists.ozlabs.org Cc: dmaengine@vger.kernel.org Cc: linux-kernel@vger.kernel.org Link: https://lore.kernel.org/r/2025050513-complex-crane-2babb6@boujee-and-buff Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -1226,6 +1226,8 @@ static int fsldma_of_probe(struct platform_device *op)
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fdev->dev = &op->dev;
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INIT_LIST_HEAD(&fdev->common.channels);
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/* The DMA address bits supported for this device. */
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fdev->addr_bits = (long)device_get_match_data(fdev->dev);
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/* ioremap the registers for use */
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fdev->regs = of_iomap(op->dev.of_node, 0);
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@ -1254,7 +1256,7 @@ static int fsldma_of_probe(struct platform_device *op)
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fdev->common.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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fdev->common.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
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dma_set_mask(&(op->dev), DMA_BIT_MASK(36));
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dma_set_mask(&(op->dev), DMA_BIT_MASK(fdev->addr_bits));
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platform_set_drvdata(op, fdev);
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@ -1387,10 +1389,20 @@ static const struct dev_pm_ops fsldma_pm_ops = {
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};
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#endif
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/* The .data field is used for dma-bit-mask. */
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static const struct of_device_id fsldma_of_ids[] = {
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{ .compatible = "fsl,elo3-dma", },
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{ .compatible = "fsl,eloplus-dma", },
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{ .compatible = "fsl,elo-dma", },
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{
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.compatible = "fsl,elo3-dma",
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.data = (void *)40,
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},
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{
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.compatible = "fsl,eloplus-dma",
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.data = (void *)36,
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},
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{
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.compatible = "fsl,elo-dma",
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.data = (void *)32,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, fsldma_of_ids);
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@ -124,6 +124,7 @@ struct fsldma_device {
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struct fsldma_chan *chan[FSL_DMA_MAX_CHANS_PER_DEVICE];
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u32 feature; /* The same as DMA channels */
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int irq; /* Channel IRQ */
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int addr_bits; /* DMA addressing bits supported */
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};
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/* Define macros for fsldma_chan->feature property */
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